Silicon carbide semiconductor device

Abstract

An n--type drift layer is an n--type epitaxial layer doped with nitrogen as an n-type dopant and is co-doped with aluminum as a p-type dopant, the n--type drift layer containing the nitrogen and aluminum substantially uniformly throughout. An n-type impurity concentration of the n--type drift layer is an impurity concentration determined by subtracting the aluminum concentration from the nitrogen concentration of the n--type drift layer; a predetermined blocking voltage is realized by the impurity concentration. A combined impurity concentration of the nitrogen and aluminum of the n--type drift layer is at least 3×1016/cm3.

What is claimed is: 
     
         1 . A silicon carbide semiconductor device, comprising:
 a semiconductor substrate containing a semiconductor having a bandgap that is wider than a bandgap of silicon; and   a device structure that is provided in the semiconductor substrate and has a predetermined blocking voltage, the device structure including a drift layer that is of an n-type, wherein   the drift layer contains a first impurity of an n-type and a second impurity of a second type,   the predetermined blocking voltage is ensured by an n-type impurity concentration determined by subtracting a concentration of the second impurity from a concentration of the first impurity of the drift layer, the n-type impurity concentration being within a first range,   a combined impurity concentration of the concentration of the first impurity and the concentration of the second impurity of the drift layer is in a second range,   when the predetermined blocking voltage is a first blocking voltage class, the first range is 1×10 16 /cm 3  ±20% and the second range is 3×10 16 /cm 3  to 1.3×10 17 /cm 3 ,   when the predetermined blocking voltage is a second blocking voltage class, the first range is 3×10 15 /cm 3  ±20% and the second range is 3×10 16 /cm 3  to 11×10 17 /cm 3 , and   when the predetermined blocking voltage is a third blocking voltage class, the first range is 1×10 15 /cm 3  ±20% and the second range is 3×10 16 /cm 3  to 9×10 16 /cm 3 .   
     
     
         2 . The silicon carbide semiconductor device according to  claim 1 , wherein
 the device structure is an insulated gate electric field effect transistor having a trench gate structure.   
     
     
         3 . The silicon carbide semiconductor device according to  claim 1 , wherein
 the device structure is an insulated gate electric field effect transistor having a planar gate structure.   
     
     
         4 . The silicon carbide semiconductor device according to  claim 1 , wherein the device structure is a Schottky barrier diode. 
     
     
         5 . The silicon carbide semiconductor device according to  claim 1 , wherein
 the drift layer is an epitaxial layer uniformly doped throughout with the first impurity and the second impurity.   
     
     
         6 . The silicon carbide semiconductor device according to  claim 1 , wherein 
 the first impurity is nitrogen, and   the second impurity is aluminum or boron.   
     
     
         7 . The silicon carbide semiconductor device according to  claim 1 , wherein 
 the semiconductor substrate contains silicon carbide.   
     
     
         8 . The silicon carbide semiconductor device according to  claim 1 , wherein 
 the first blocking voltage class is 1.2 kV-class,   the second blocking voltage class is 3.3 kV-class, and   the third blocking voltage class is 6.5 kV-class.