Blocking Structures on Isolation Structures

Abstract

A semiconductor device includes a semiconductor substrate, a plurality of isolation structures on the semiconductor substrate, and a plurality of blocking structures disposed directly over the isolation structures. The blocking structures have a lower reflectivity than the isolation structures.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate;   a first doped region, a second doped region, a third doped region, and a fourth doped region disposed in the semiconductor substrate, wherein the first doped region circumscribes the second doped region, the third doped region, and the fourth doped region;   a first isolation structure disposed in the semiconductor substrate, wherein the first isolation structure circumscribes the first doped region;   a second isolation structure disposed in the semiconductor substrate, wherein the second isolation structure circumscribes the second doped region, the third doped region, and the fourth doped region, and further wherein the first doped region is disposed between the second isolation structure and the first isolation structure;   a first blocking structure and a second blocking structure disposed over the first isolation structure, wherein the first blocking structure is oriented lengthwise along a first direction, the second blocking structure is oriented lengthwise along a second direction, and the second direction is different than the first direction; and   wherein the first blocking structure and the second blocking structure are formed of a first material, the first isolation structure and the second blocking structure are formed of a second material, and the first material is different than the second material.   
     
     
         2 . The semiconductor device of  claim 1 , wherein:
 the first material has a first reflectivity;   the second material has a second reflectivity; and   the first reflectivity is less than the second reflectivity.   
     
     
         3 . The semiconductor device of  claim 1 , wherein:
 a first width of the first blocking structure is along the second direction and a second width of the second blocking structure is along the first direction;   the first blocking structure is disposed on a first portion of the first isolation structure, wherein the first portion of the first isolation structure has a third width along the second direction and the first width is at least 30% of the third width; and   the second blocking structure is disposed on a second portion of the first isolation structure, wherein the second portion of the second isolation structure has a fourth width along the first direction and the second width is at least 30% of the fourth width.   
     
     
         4 . The semiconductor device of  claim 1 , wherein:
 the first doped region has a first dimension along the first direction and a second dimension along the second direction;   the first blocking structure includes a first blocking feature and a second blocking feature oriented lengthwise along the first direction, wherein the first blocking feature and the second blocking feature are separated by a spacing along the first direction; and   a sum of the spacing, a first length of the first blocking feature along the first direction, and a second length of the second blocking feature along the first direction is less than the first dimension of the first doped region along the first direction.   
     
     
         5 . The semiconductor device of  claim 4 , wherein:
 the spacing is a first spacing;   the second blocking structure includes a third blocking feature and a fourth blocking feature oriented lengthwise along the second direction, wherein the third blocking feature and the fourth blocking feature are separated by a second spacing along the second direction; and   a sum of the second spacing, a third length of the third blocking feature along the second direction, and a fourth length of the fourth blocking feature along the second direction is less than the second dimension of the first doped region along the second direction.   
     
     
         6 . The semiconductor device of  claim 5 , wherein:
 the first blocking feature and the second blocking feature have a first width along the second direction; and   the third blocking feature and the fourth blocking feature have a second width along the second direction, wherein the second width is different than the first width.   
     
     
         7 . The semiconductor device of  claim 1 , wherein:
 the third doped region is between the second doped region and the fourth doped region;   the second doped region, the third doped region, and the fourth doped region are oriented lengthwise along the first direction; and   the second doped region and the fourth doped region have a first length along the first direction, the third doped region has a second length along the first direction, and the second length is different than the first length.   
     
     
         8 . The semiconductor device of  claim 7 , wherein the third doped region is doped with a first type dopant and the second doped region and the fourth doped region are doped with a second type dopant that is different than the first type dopant. 
     
     
         9 . The semiconductor device of  claim 7 , wherein the second doped region, the third doped region, and the fourth doped region are doped with a same type of dopant. 
     
     
         10 . The semiconductor device of  claim 1 , wherein the first doped region is doped with a first type dopant and the second doped region, the third doped region, and the fourth doped region are doped with a second type dopant that is different than the first type dopant. 
     
     
         11 . The semiconductor device of  claim 1 , wherein:
 a patterned photoresist mask has a first dimension along the first direction and a second dimension along the second direction, wherein the patterned photoresist mask is used during an implantation process when fabricating the semiconductor device; and   a length of the first blocking structure along the first direction is at least 50% of the first dimension of the patterned photoresist mask along the first direction.   
     
     
         12 . The semiconductor device of  claim 11 , wherein a length of the second blocking structure along the second direction is at least 50% of the second dimension of the patterned photoresist mask along the second direction. 
     
     
         13 . The semiconductor device of  claim 11 , wherein the patterned photoresist mask includes more than one photoresist feature. 
     
     
         14 . A semiconductor device comprising:
 a shallow trench isolation structure disposed over a semiconductor substrate;   a first doped region and a second doped region disposed in the semiconductor substrate, wherein the shallow trench isolation structure circumscribes the first doped region and the first doped region circumscribes the second doped region; and   a blocking structure disposed over the shallow trench isolation structure, wherein the blocking structure surrounds the first doped region and the blocking structure includes at least one blocking feature disposed along each side of the first doped region.   
     
     
         15 . The semiconductor device of  claim 14 , wherein the shallow trench isolation structure is a first shallow trench isolation structure and the semiconductor device further includes a second shallow trench isolation structure, wherein the second shallow trench isolation structure circumscribes the second doped region and the first doped region circumscribes the second shallow trench isolation structure. 
     
     
         16 . The semiconductor device of  claim 14 , wherein:
 the first doped region has a first side, a second side, a third side, and a fourth side, wherein the first side and the second side extend lengthwise along a first direction, the third side and the fourth side extend lengthwise along a second direction, and the second direction is different than the first direction;   a first blocking feature is disposed on the shallow trench isolation structure along the first side of the first doped region, a second blocking feature is disposed on the shallow trench isolation structure along the second side of the first doped region, a third blocking feature is disposed on the shallow trench isolation structure along the third side of the first doped region, and a fourth blocking feature is disposed on the shallow trench isolation structure along the fourth side of the first doped region; and   the first blocking feature and the second blocking feature are oriented lengthwise along the first direction and the third blocking feature and the fourth blocking feature are oriented lengthwise along the second direction.   
     
     
         17 . The semiconductor device of  claim 16 , wherein:
 a fifth blocking feature is disposed on the shallow trench isolation structure along the first side of the first doped region, a sixth blocking feature is disposed on the shallow trench isolation structure along the second side of the first doped region, a seventh blocking feature is disposed on the shallow trench isolation structure along the third side of the first doped region, and an eighth blocking feature is disposed on the shallow trench isolation structure along the fourth side of the first doped region; and   the fifth blocking feature and the sixth blocking feature are oriented lengthwise along the first direction and the seventh blocking feature and the eighth blocking feature are oriented lengthwise along the second direction.   
     
     
         18 . The semiconductor device of  claim 14 , wherein a width of the blocking structure is at least 30% of a width of the shallow trench isolation structure. 
     
     
         19 . The semiconductor device of  claim 14 , wherein a length of the blocking structure is at least 50% of a length of a patterned photoresist feature that covers the second doped region during an implantation process used during fabrication of the semiconductor device. 
     
     
         20 . A semiconductor device comprising:
 a doped region of a semiconductor substrate disposed between a first isolation structure and a second isolation structure, wherein the first isolation structure surrounds the doped region and the doped region surrounds the second isolation structure   a blocking structure disposed over the first isolation structure and configured to surround the doped region, wherein the blocking structure includes a first set of blocking structures oriented lengthwise along a first direction and a second set of blocking structures oriented lengthwise along a second direction that is different than the first direction; and   wherein a portion of the first set of blocking structures is disposed along a side of the doped region and a sum of lengths of the portion of the first set of blocking structures is at least 50% of a length of a patterned photoresist feature circumscribed by the doped region and used during fabrication of the semiconductor device, wherein the patterned photoresist feature is oriented lengthwise along the first direction.