Power conversion module
Abstract
A power conversion module and method of forming the same includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 - 10 . (canceled)
21 . A power conversion module comprising:
a first daughterboard coupled to a first pad and a second pad on a motherboard, the first daughterboard comprising a high side transistor for the power conversion module; and a second daughterboard coupled to a third pad and a fourth pad on the mother board, the second daughterboard comprising a low side transistor for the power conversion module.
22 . The power conversion module of claim 21 , wherein the first daughterboard and the second daughter board are mounted on the mother board.
23 . The power conversion module of claim 22 , where the first daughterboard is mounted on a first side of the motherboard and the second daughterboard is mounted on a second side of the mother board.
24 . The power conversion module of claim 21 , wherein the first daughterboard and the second daughterboard have the same footprint.
25 . The power conversion module of claim 24 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
26 . The power conversion module of claim 21 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).
27 . The power conversion module of claim 26 , wherein the high side transistor is a component of an integrated circuit (IC) chip mounted on the first daughterboard and the low side transistor is a component of an IC chip mounted on the second daughterboard.
28 . The power conversion module of claim 26 , wherein the high side transistor is formed on a first die integrated with the first daughterboard and the low side transistor is formed on a second die integrated with the second daughterboard.
29 . The power conversion module of claim 21 , wherein an output node on the motherboard is configured to be coupled to a load and an area circumscribed by a current loop for current flowing through a decoupling capacitor.
30 . The power conversion module of claim 29 , wherein the high side transistor and the low side transistor define a loop area of the power conversion module.
31 . The power conversion module of claim 29 , wherein a first leg of the current loop flows in a first direction through the first daughterboard, and a second leg of the current loop flows in a second direction through the second daughterboard, the second direction being opposite of the first direction.
32 . The power conversion module of claim 21 , further comprising:
a first thermal substrate thermally coupled to the first daughterboard; and a second thermal substrate thermally coupled to the second daughterboard.
33 . The power conversion module of claim 32 , wherein the first thermal substrate comprises:
a direct bonded copper (DBC) patterned layer overlaying a first surface of a ceramic substrate, the DBC patterned layer being in contact with the first daughterboard; and a DBC plate overlaying a second surface of the ceramic layer, the DBC plate being electrically isolated from the first daughterboard and in thermal communication with the first daughterboard.
34 . The power conversion module of claim 33 , further comprising a housing circumscribing edges of the first thermal substrate and the second thermal substrate.
35 . The power conversion module of claim 33 , wherein the power conversion module is a direct current (DC) to alternating current (AC) power conversion module or a DC-to-DC power conversion module.
36 . A power conversion module comprising:
a high side transistor electrically coupled to a first pad and a second pad on a motherboard; a low side transistor electrically coupled to a third pad and a fourth pad on the motherboard; a first thermal substrate thermally coupled to the high side transistor; and a second thermal substrate thermally coupled to the low side transistor.
37 . The power conversion module of claim 36 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
38 . The power conversion module of claim 36 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).
39 . A method for forming a power conversion module, the method comprising:
coupling a decoupling capacitor on a motherboard to a high side transistor on a first daughterboard and coupling the high side transistor to an output node of the power conversion module, the output node being situated on the motherboard; and coupling a low side transistor on a second daughterboard such that the output node is electrically coupled to a low side transistor of the power conversion module and the low side transistor is electrically coupled to the decoupling capacitor.
40 . The method of claim 39 , further comprising:
mounting a first thermal substrate on the power conversion module to contact the first daughterboard; and mounting a second thermal substrate on the power conversion module to contact the second daughterboard.
41 . The method of claim 40 , wherein the first daughterboard and the second daughterboard have the same footprint.
42 . The method of claim 41 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
43 . The method of claim 42 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).Join the waitlist — get patent alerts
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