US2024337799A1PendingUtilityA1

Co-Packaging Assembly and Method for Attaching Photonic Dies/Modules to Multi-Chip Active/Passive Substrate

51
Assignee: CHIPLETZ INCPriority: Apr 7, 2023Filed: Apr 7, 2023Published: Oct 10, 2024
Est. expiryApr 7, 2043(~16.7 yrs left)· nominal 20-yr term from priority
H10W 90/00H10W 70/685H10W 70/614H10W 70/611G02B 6/4249G02B 6/4238G02B 6/4245G02B 6/424G02B 6/4239G02B 6/4201G02B 6/428G02B 6/4269G02B 6/43
51
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A method and apparatus are provided for manufacturing an integrated circuit package assembly which includes a multichip package substrate having active and/or passive circuit devices embedded in one or more substrate core layers, a plurality of encapsulated integrated circuit devices attached to the multichip package substrate, and an optical waveguide fiber connected to a photonic integrated circuit device that is located in either the multichip package substrate or the encapsulated plurality of integrated circuit devices, where the optical waveguide fiber is optically coupled to an exposed fiber coupling region of the photonic integrated circuit device.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An integrated circuit package assembly, comprising:
 a multichip package substrate comprising active and/or passive circuit devices embedded in one or more substrate core layers;   a plurality of integrated circuit devices attached to the multichip package substrate; and   an optical waveguide fiber connected to a photonic integrated circuit device that is located in either the multichip package substrate or the plurality of integrated circuit devices, where the optical waveguide fiber is optically coupled to an exposed fiber coupling region of the photonic integrated circuit device.   
     
     
         2 . The integrated circuit package of  claim 1 , further comprising a heat spreader lid that is formed on and thermally connected to the plurality of integrated circuit devices with one or more thermal conductive layers to remove heat from the plurality of integrated circuit devices. 
     
     
         3 . The integrated circuit package of  claim 1 , where the photonic integrated circuit device is embedded as a face-up photonic integrated circuit device in a cavity of the multichip package substrate with the exposed fiber coupling region positioned for edge coupling attachment to the optical waveguide fiber. 
     
     
         4 . The integrated circuit package of  claim 1 , where the photonic integrated circuit device is embedded as a face-up photonic integrated circuit device in a blind cavity of the multichip package substrate with the exposed fiber coupling region positioned for edge coupling attachment to the optical waveguide fiber. 
     
     
         5 . The integrated circuit package of  claim 1 , where the photonic integrated circuit device is attached as a face-down photonic integrated circuit device in the plurality of integrated circuit devices, where the face-down photonic integrated circuit device extends laterally past a side of the multichip package substrate so that the exposed fiber coupling region is positioned for edge coupling attachment to the optical waveguide fiber. 
     
     
         6 . The integrated circuit package of  claim 1 , where the photonic integrated circuit device is attached as a face-down photonic integrated circuit device in the plurality of integrated circuit devices, where the face-down photonic integrated circuit device extends laterally past a cutout region in multichip package substrate so that the exposed fiber coupling region is positioned for edge coupling attachment to the optical waveguide fiber. 
     
     
         7 . The integrated circuit package of  claim 1 , where the photonic integrated circuit device is attached as a face-down photonic integrated circuit device in the plurality of integrated circuit devices, where the face-down photonic integrated circuit device has a partially thinned backside surface forming the exposed fiber coupling region that is positioned for vertical backside coupling attachment to the optical waveguide fiber. 
     
     
         8 . The integrated circuit package of  claim 1 , where the plurality of integrated circuit devices comprises an encapsulated plurality of integrated circuit devices attached to the multichip package substrate. 
     
     
         9 . A method for making a package assembly, comprising:
 assembling a multichip package substrate comprising a photonic integrated circuit device sandwiched between a first redistribution line stack and a second redistribution line stack, where the photonic integrated circuit device comprises a fiber coupling region positioned at a peripheral side of the multichip package substrate and covered by the first redistribution line stack;   selectively etching the first redistribution line stack to expose the fiber coupling region;   attaching, to the multichip package substrate, a first plurality of surface-attachable devices which have interconnect surfaces facing the multichip package substrate and which do not cover the exposed fiber coupling region of the photonic integrated circuit device, where at least one of the first plurality of surface-attachable devices comprises an electronics integrated circuit device which is positioned over and connected for communication with the photonic integrated circuit device;   cutting through the multichip package substrate to expose a side edge of the photonic integrated circuit device and the exposed fiber coupling region;   attaching the second redistribution line stack of the multichip package substrate to a circuit board; and   attaching an optical waveguide fiber to the exposed fiber coupling region of the photonic integrated circuit device.   
     
     
         10 . The method of  claim 9 , where assembling the multichip package substrate comprises embedding the photonic integrated circuit device as a face-up photonic integrated circuit device with a plurality of active and/or passive circuit components in the multichip package substrate to be sandwiched between the first redistribution line stack and the second redistribution line stack. 
     
     
         11 . The method of  claim 9 , where assembling the multichip package substrate comprises embedding the photonic integrated circuit device in a substrate core cavity of the multichip package substrate. 
     
     
         12 . The method of  claim 9 , where assembling the multichip package substrate comprises placing the photonic integrated circuit device in a blind substrate core cavity of the multichip package substrate. 
     
     
         13 . The method of  claim 10 , further comprising:
 placing a sacrificial protective layer over the fiber coupling region of the face-up embedded photonics integrated circuit device during assembly of the multichip package substrate, and   removing the sacrificial protective layer from the fiber coupling region prior to attaching the optical waveguide fiber.   
     
     
         14 . The method of  claim 10 , where the face-up embedded photonics integrated circuit device is connected to one or both of the first redistribution line stack and second redistribution line stack. 
     
     
         15 . A method for making a package assembly, comprising:
 assembling a multichip package substrate comprising a plurality of active and/or passive circuit components sandwiched between a first redistribution line stack and a second redistribution line stack;   attaching, to the first redistribution line stack of the multichip package substrate, a first plurality of surface-attachable devices which have interconnect surfaces facing the multichip package substrate, where at least one of the first plurality of surface-attachable devices comprises a photonic integrated circuit device comprising a fiber coupling region positioned to extend laterally past a side edge of the multichip package substrate;   attaching the second redistribution line stack of the multichip package substrate to a circuit board; and   attaching an optical waveguide fiber to the exposed fiber coupling region of the photonic integrated circuit device.   
     
     
         16 . The method of  claim 15 , where the photonic integrated circuit device is attached as a face-down photonic integrated circuit device with the fiber coupling region facing the multichip package substrate for attachment to the optical waveguide fiber. 
     
     
         17 . The method of  claim 15 , where the first plurality of surface-attachable devices are attached to the multichip package substrate as an encapsulated plurality of surface-attachable devices. 
     
     
         18 . A method for making a package assembly, comprising:
 assembling a multichip package substrate comprising a plurality of active and/or passive circuit components sandwiched between a first redistribution line stack and a second redistribution line stack;   attaching, to the first redistribution line stack of the multichip package substrate, a first plurality of surface-attachable devices which have interconnect surfaces facing the multichip package substrate, where at least one of the first plurality of surface-attachable devices comprises a photonic integrated circuit device comprising a fiber coupling region positioned at a peripheral side of the first plurality of surface-attachable devices;   encapsulating the first plurality of surface-attachable devices at the multichip package substrate with a molding compound structure;   grinding or etching a portion of the molding compound structure and a backside surface of the photonic integrated circuit device to form a thinned backside surface in alignment with the fiber coupling region; and   attaching an optical waveguide fiber to the thinned backside surface of the photonic integrated circuit device.   
     
     
         19 . The method of  claim 18 , where the photonic integrated circuit device is attached as a face-down photonic integrated circuit device with an active photonic integrated circuit device side facing multichip package substrate for vertical backside coupling to the optical waveguide fiber. 
     
     
         20 . The method of  claim 18 , where encapsulating the first plurality of surface-attachable devices with the molding compound structure comprises:
 attaching, to the multichip package substrate, a stiffener ring surrounding the first plurality of surface-attachable devices;   encapsulating the first plurality of surface-attachable devices and the stiffener ring with a molding compound material; and   curing the molding compound material to form the molding compound structure.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.