Semiconductor device
Abstract
A semiconductor device includes a semiconductor substrate, an insulating film, a first coil, a second coil, a third coil, a fourth coil, a first guard ring and a second guard ring. The first coil and the second coil are formed on the semiconductor substrate. The third coil faces the first coil through the insulating film. The fourth coil faces the second coil through the insulating film. The first guard ring is formed to surround the third coil in plan view. The second guard ring is formed to surround the fourth coil in plan view. The first guard ring and the second guard ring are adjacent to each other while being spaced apart from each other in plan view.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a semiconductor substrate; an insulating film; a first coil, a second coil, a third coil and a fourth coil; and a first guard ring and a second guard ring; wherein the first coil and the second coil are formed on the semiconductor substrate, wherein the third coil faces the first coil through the insulating film, wherein the fourth coil faces the second coil through the insulating film, wherein the first guard ring is formed to surround the third coil in plan view, wherein the second guard ring is formed to surround the fourth coil in plan view, and wherein the first guard ring and the second guard ring are adjacent to each other while being spaced apart from each other in plan view.
2 . The semiconductor device according to claim 1 ,
wherein the first coil and the second coil are arranged side by side in a first direction in plan view, wherein each of the first guard ring and the second guard ring has a first straight-line portion extending in a second direction perpendicular to the first direction, and wherein the first straight-line portion of the first guard ring is arranged to face the first straight-line portion of the second guard ring.
3 . The semiconductor device according to claim 2 ,
wherein the first straight-line portion has a first end and a second end on the opposite side of the first end, and wherein a remaining portion of each of the first guard ring and the second guard ring extends from the first end to the second end while being curved in plan view.
4 . The semiconductor device according to claim 2 ,
wherein the first straight-line portion has a first end and a second end on the opposite side of the first end, wherein each of the first guard ring and the second guard ring further has a second straight-line portion, a third straight-line portion, a first corner portion, a second corner portion, and a circular arc portion, wherein the second straight-line portion and the third straight-line portion extend in the first direction and face each other in the second direction, wherein the second straight-line portion has a third end and a fourth end on the opposite side of the third end, wherein the third straight-line portion has a fifth end and a sixth end on the opposite side of the fifth end, wherein the first corner portion connects the third end and the first end, wherein the second corner portion connects the fifth end and the second end, wherein the first corner portion and the second corner portion extend in a curved shape in plan view, and wherein the circular arc portion connects the fourth end and the sixth end, and extends in a circular arc shape in plan view.
5 . The semiconductor device according to claim 2 ,
wherein in the second direction, a length of the first straight-line portion is equal to or larger than a width of the third coil and a width of the fourth coil.
6 . The semiconductor device according to claim 5 ,
wherein the length of the first straight-line portion in the second direction is equal to or larger than 50 μm.
7 . The semiconductor device according to claim 1 ,
wherein the third coil, the fourth coil, the first guard ring, and the second guard ring are formed in the same layer in a cross-sectional view.
8 . The semiconductor device according to claim 1 further comprising:
a third guard ring,
wherein the third guard ring is formed to surround the first guard ring and the second guard ring in plan view.
9 . The semiconductor device according to claim 8 ,
wherein a first distance that is a shortest distance between the first guard ring and the second guard ring in plan view is smaller than a second distance that is a shortest distance between the first guard ring and the third guard ring in plan view and a third distance that is a shortest distance between the second guard ring and the third guard ring in plan view.
10 . The semiconductor device according to claim 9 ,
wherein the first distance is equal to or larger than 15 μm, and wherein each of the second distance and the third distance is equal to or larger than 50 μm.
11 . The semiconductor device according to claim 8 ,
wherein each of a first voltage applied to the first guard ring and a second voltage applied to the second guard ring is higher than a third voltage applied to the third guard ring.
12 . The semiconductor device according to claim 1 ,
wherein the first coil and the third coil configure a high-side transformer when being magnetically coupled, and wherein the second coil and the fourth coil configure a low-side transformer when being magnetically coupled.
13 . A semiconductor device comprising:
a semiconductor substrate; a first insulating film, a second insulating film, and a third insulating film; a first wiring layer, a second wiring layer, and a third wiring layer; a first coil, a second coil, a third coil, and a fourth coil; and a first guard ring and a second guard ring, wherein the first insulating film is formed on the semiconductor substrate, wherein the first wiring layer is formed on the first insulating film, wherein the second insulating film is formed on the first insulating film to cover the first wiring layer, wherein the second wiring layer is arranged on the second insulating film, wherein the third insulating film is formed on the second insulating film to cover the second wiring layer, wherein the third wiring layer is formed on the third insulating film, wherein the first coil and the second coil are formed in the first wiring layer, wherein the third coil is formed in the third wiring layer, wherein the fourth coil is formed in the second wiring layer, wherein the first coil and the third coil face each other through the second insulating film and the third insulating film, wherein the second coil and the fourth coil face each other through the second insulating film, wherein the first guard ring is formed to surround the third coil in plan view, wherein the second guard ring is formed to surround the fourth coil in plan view, and wherein the first guard ring and the second guard ring are adjacent to each other while being spaced apart from each other in plan view.
14 . The semiconductor device according to claim 13 ,
wherein the first guard ring is formed in the third wiring layer, and wherein the second guard ring is formed in the second wiring layer.
15 . The semiconductor device according to claim 13 further comprising:
a third guard ring,
wherein the third guard ring is formed to surround the first guard ring and the second guard ring in plan view.
16 . The semiconductor device according to claim 15 ,
wherein a first distance that is a shortest distance between the first guard ring and the second guard ring in plan view is smaller than a second distance that is a shortest distance between the first guard ring and the third guard ring in plan view and a third distance that is a shortest distance between the second guard ring and the third guard ring in plan view.
17 . The semiconductor device according to claim 16 ,
wherein the first distance is equal to or larger than 15 μm, and wherein each of the second distance and the third distance is equal to or larger than 50 μm.
18 . The semiconductor device according to claim 13 ,
wherein the first coil and the second coil are arranged side by side in a first direction in plan view, wherein in the first direction, a width of the second coil and a width of the fourth coil are smaller than a width of the first coil and a width of the third coil, and wherein in a second direction perpendicular to the first direction, a width of the second coil and a width of the fourth coil in a second direction perpendicular to the first direction are smaller than a width of the first coil and a width of the third coil therein.
19 . The semiconductor device according to claim 13 ,
wherein the number of windings of the second coil and the number of windings of the fourth coil are smaller than the number of windings of the first coil and the number of windings of the third coil.
20 . A semiconductor device comprising:
a first semiconductor chip; a second semiconductor chip; a third semiconductor chip; and a fourth semiconductor chip, wherein the first semiconductor chip includes a first transmission circuit and a second transmission circuit, wherein the second semiconductor chip includes a high-side first transformer and a low-side second transformer, wherein the third semiconductor chip includes a first reception circuit, wherein the fourth semiconductor chip includes a second reception circuit, wherein a signal transmitted by the first transmission circuit is transmitted to the first reception circuit via the first transformer, wherein a signal transmitted by the second transmission circuit is transmitted to the second reception circuit via the second transformer, wherein the third semiconductor chip includes a semiconductor substrate, an insulating film, a first coil, a second coil, a third coil, a fourth coil, a first guard ring and a second guard ring, wherein the first coil and the second coil are formed on the semiconductor substrate, wherein the third coil faces the first coil through the insulating film, wherein the fourth coil faces the second coil through the insulating film, wherein the first coil and the third coil configure the first transformer when being magnetically coupled, wherein the second coil and the fourth coil configure the second transformer when being magnetically coupled, and wherein the first guard ring is formed to surround the third coil in plan view, wherein the second guard ring is formed to surround the fourth coil in plan view, and wherein the first guard ring and the second guard ring are adjacent to each other while being spaced apart from each other in plan view.Join the waitlist — get patent alerts
Track US2025157917A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.