US2026013208A1PendingUtilityA1

Selective removal of semiconductor fins

96
Assignee: ADEIA SEMICONDUCTOR SOLUTIONS LLCPriority: Jul 8, 2014Filed: Sep 12, 2025Published: Jan 8, 2026
Est. expiryJul 8, 2034(~8 yrs left)· nominal 20-yr term from priority
H10P 32/30H10P 30/40H10P 76/204H10P 50/693H10P 50/667H10P 50/646H10P 50/642H10P 50/283H10P 30/222H10P 14/61H10W 10/17H10W 10/014H10D 84/834H10D 84/0158H10D 84/0151H10D 64/514H10D 62/116H10D 30/0243H10D 30/62H10D 30/024H10D 84/0128H10D 84/038H01L 21/3215H01L 21/31155H01L 21/76224H01L 21/32134H01L 21/32H01L 21/31111H01L 21/3083H01L 21/30612H01L 21/30604H01L 21/26586H01L 21/0273H10P 30/221
96
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Claims

Abstract

An array of semiconductor fins is formed on a top surface of a substrate. A dielectric material liner is formed on the surfaces of the array of semiconductor fins. A photoresist layer is applied and patterned such that sidewalls of an opening in the photoresist layer are parallel to the lengthwise direction of the semiconductor fins, and are asymmetrically laterally offset from a lengthwise direction passing through the center of mass of a semiconductor fin to be subsequently removed. An angled ion implantation is performed to convert a top portion of dielectric material liner into a compound material portion. The compound material portion is removed selective to the remaining dielectric material liner, and the physically exposed semiconductor fin can be removed by an etch or converted into a dielectric material portion by a conversion process. The dielectric material liner can be removed after removal of the semiconductor fin.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A method of forming a semiconductor structure comprising:
 forming a plurality of adjacent semiconductor fins on a substrate comprising a first fin, second and third fins on one side of the first fin, and fourth and fifth fins on an opposite side of the first fin;   forming a first dielectric material on exposed surfaces of the plurality of adjacent semiconductor fins and the substrate;   exposing a portion of the first fin of the plurality of adjacent semiconductor fins;   removing the first fin from the location of the exposed portion, wherein the removing forms a recess in the substrate extending below a base of the second, third, fourth, and fifth fins; and   forming a second dielectric material in areas between each of the second, third, fourth, and fifth fins and in the recess.   
     
     
         22 . The method of  claim 21 , wherein forming the first dielectric material comprises depositing a dielectric material layer having a thickness in a range from 5 nm to 100 nm. 
     
     
         23 . The method of  claim 21 , wherein forming the first dielectric material comprises depositing a silicon nitride material layer. 
     
     
         24 . The method of  claim 21 , wherein forming the first dielectric material comprises depositing a metal oxide material layer. 
     
     
         25 . The method of  claim 21 , wherein forming the first dielectric material comprises depositing a silicon oxide material layer. 
     
     
         26 . The method of  claim 21 , wherein forming the first dielectric material comprises depositing an amorphous carbon material layer. 
     
     
         27 . The method of  claim 21 , wherein exposing the portion of the first fin comprises forming a mask covering the second and third fins. 
     
     
         28 . The method of  claim 21 , wherein exposing the portion of the first fin comprises implanting an implant material into a portion of the first dielectric material covering the first fin. 
     
     
         29 . The method of  claim 28 , wherein exposing the portion of the first fin further comprises etching the implanted portion of the first dielectric material. 
     
     
         30 . The method of  claim 28 , wherein exposing the portion of the first fin comprises etching the implanted portion of the first dielectric material using phosphoric acid. 
     
     
         31 . The method of  claim 28 , wherein exposing the portion of the first fin comprises etching the implanted portion of the first dielectric material using hydrofluoric acid. 
     
     
         32 . The method of  claim 28 , wherein the implant material comprises phosphorous. 
     
     
         33 . The method of  claim 28 , wherein the implant material comprises boron. 
     
     
         34 . The method of  claim 28 , wherein the implant material comprises fluorine. 
     
     
         35 . The method of  claim 21 , wherein the implant material comprises oxygen. 
     
     
         36 . The method of  claim 21 , wherein forming the second dielectric material comprises depositing a silicon oxide. 
     
     
         37 . The method of  claim 21 , wherein forming the second dielectric material comprises depositing a silicon oxynitride. 
     
     
         38 . The method of  claim 21 , wherein the second material is the same as the first material. 
     
     
         39 . The method of  claim 21 , wherein the second material is different from the first material. 
     
     
         40 . The method of  claim 21 , further comprising:
 forming a gate structure on a portion of the second dielectric material between the second and third fins.

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