High-temperature silicide contact for backside source/drain contacts

Abstract

A semiconductor structure having a high-temperature silicide contact for backside source/drain (S/D) contacts and method for making the same is disclosed. In an aspect, the semiconductor structure comprises a substrate; a source/drain (S/D) structure comprising a lower S/D portion disposed above the substrate and an upper S/D portion disposed above the lower S/D portion, the lower S/D portion comprising a high temperature silicide structure and an etch stop material structure surrounding at least a portion of the high temperature silicide structure, the upper S/D portion comprising an epitaxial (EPI) material in contact with the high temperature silicide structure; and a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a substrate;   a source/drain (S/D) structure comprising a lower S/D portion disposed above the substrate and an upper S/D portion disposed above the lower S/D portion, the lower S/D portion comprising a high temperature silicide structure and an etch stop material structure surrounding at least a portion of the high temperature silicide structure, the upper S/D portion comprising an epitaxial (EPI) material in contact with the high temperature silicide structure; and   a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein the high temperature silicide structure comprises a structure having an annealing temperature of at least 350 degrees Celsius. 
     
     
         3 . The semiconductor structure of  claim 1 , wherein the high temperature silicide structure comprises a structure having an annealing temperature of at least 750 degrees Celsius. 
     
     
         4 . The semiconductor structure of  claim 1 , wherein the S/D structure further comprises a frontside high temperature silicide contact structure extending through the EPI material of the upper S/D portion into the high temperature silicide structure of the lower S/D portion. 
     
     
         5 . The semiconductor structure of  claim 1 , wherein the backside metal structure is in contact with a bottom surface of the high temperature silicide structure. 
     
     
         6 . The semiconductor structure of  claim 5 , wherein the backside metal structure is further in contact with a side surface of the high temperature silicide structure. 
     
     
         7 . The semiconductor structure of  claim 1 , wherein the etch stop material comprises at least one of silicon carbon nitride (SiCN), silicon carbon oxynitride (SiCON), aluminum nitride (AlN), or an area-selective deposition (ASD) dielectric. 
     
     
         8 . The semiconductor structure of  claim 1 , wherein the high temperature silicide structure comprises at least one of titanium (Ti), cobalt (Co), or nickel (Ni). 
     
     
         9 . A method for fabricating a semiconductor structure, the method comprising:
 providing a substrate;   forming, above the substrate, a lower portion of a source/drain (S/D) structure comprising a high temperature silicide structure and an etch stop material structure that surrounds at least a portion of the high temperature silicide structure;   forming, above the lower portion of the S/D structure, an upper portion of the S/D structure comprising an epitaxial (EPI) material that is in contact with the high temperature silicide structure; and   forming a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure.   
     
     
         10 . The method of  claim 9 , wherein forming the lower portion of the S/D structure comprises:
 forming the etch stop material structure;   depositing the high temperature silicide structure above the etch stop material structure; and   annealing the high temperature silicide structure.   
     
     
         11 . The method of  claim 10 , wherein annealing the high temperature silicide structure comprises annealing the high temperature silicide structure at a temperature of at least 350 degrees Celsius. 
     
     
         12 . The method of  claim 10 , wherein annealing the high temperature silicide structure comprises annealing the high temperature silicide structure at a temperature of at least 750 degrees Celsius. 
     
     
         13 . The method of  claim 10 , wherein forming the etch stop material structure comprises forming the etch stop material from at least one of silicon carbon nitride (SiCN), silicon carbon oxynitride (SiCON), aluminum nitride (AlN), or an area-selective deposition (ASD) dielectric. 
     
     
         14 . The method of  claim 9 , wherein forming the upper portion of the S/D structure further comprises:
 forming a frontside contact metal structure extending through the EPI material into the high temperature silicide structure in the lower portion of the S/D structure; and   performing high temperature annealing of at least 750 degrees Celsius.   
     
     
         15 . The method of  claim 9 , wherein forming the backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure comprises:
 etching the substrate to expose the etch stop material;   etching the etch stop material to expose at least a bottom surface of the high temperature silicide structure; and   depositing metal onto the least the bottom surface of the high temperature silicide structure to form the backside metal structure.   
     
     
         16 . The method of  claim 15 , wherein etching the etch stop material to expose at least the bottom surface of the high temperature silicide structure comprises etching the etch stop material to further expose a side surface of the high temperature silicide structure. 
     
     
         17 . The method of  claim 9 , wherein forming the backside metal structure comprises forming a copper structure. 
     
     
         18 . The method of  claim 9 , wherein the high temperature silicide structure comprises at least one of titanium (Ti), cobalt (Co), or nickel (Ni). 
     
     
         19 . An apparatus, comprising:
 a field effect transistor (FET) structure, bwherein the FET structure comprises:
 a substrate; 
 a gate structure, disposed above the substrate and comprising a vertical metal gate structure and a channel structure, the channel structure comprising a plurality of vertically-stacked channels extending horizontally through the vertical metal gate structure; 
 a source/drain (S/D) structure, comprising a lower S/D portion, disposed above the substrate, comprising a high temperature silicide structure and an etch stop material structure surrounding at least a portion of the high temperature silicide structure, and further comprising an upper S/D portion, disposed above the lower S/D portion, comprising an epitaxial (EPI) material in contact with a first end of each vertically-stacked channel of the plurality of vertically-stacked channels; and 
 a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure. 
   
     
     
         20 . The apparatus of  claim 19 , wherein the S/D structure further comprises a frontside high temperature silicide contact structure extending through the EPI material of the upper S/D portion into the high temperature silicide structure of the lower S/D portion.