Method of and device for isolating active areas of a semiconducor substrate by quasi-plane shallow trenches

Abstract

The semiconductor device comprises in a semiconductor substrate (1) at least one predetermined region (6) of the substrate intended subsequently to form an active area, uncovered on its upper surface and situated between the lateral trenches (7) containing an insulative material including at least one layer of a conformal oxide, the insulative material forming on either side of said uncovered predetermined region of the substrate a boss (16) on the plane upper surface of the device. The height of the boss is less than 1 000 Å and the insulative material can also include planarising oxide.

We claim: 
     
       1. Method of isolating active areas of a semiconductor substrate with lateral trenches characterised in that: a) trenches (7) are formed in the semiconductor substrate (1) laterally of predetermined regions (6) of the substrate intended subsequently to form said active areas (6),   b) at least one layer (8) of an insulative conformal oxide is deposited in the trenches (7) and on said predetermined regions (6) of the substrate,   c) the semiconductor block obtained in step b) is annealed, and   d) the annealed semiconductor block is partially and selectively etched to leave on either side of each predetermined region (6) of the substrate or on either side of groups of neighbouring predetermined regions (106) of the substrate projecting areas of conformal oxide (13, 113),   e) the conformal oxide layer (10, 110) of the semiconductor block formed in step d) is partially mechanical/chemical polished to reduce the height of the projecting conformal oxide areas below a chosen residual relief height,   f) the predetermined regions (6, 106) of the substrate are uncovered by chemical etching with detection of end of attack on the semiconductor block formed in step e).   
     
     
       2. Method according to claim 1 characterised in that in step a) the definition of the predetermined regions (6) of the substrate includes the production of a mask and some of the projecting regions (13) are produced using a mask corresponding to the negative of the mask defining the predetermined regions (6) of the substrate. 
     
     
       3. Method according to claim 1 characterised in that it in step a) the definition of the predetermined regions (106) of the substrate includes the production of a mask and some of the projecting regions (113) are produced using a mask enlarged relative to the negative of the mask defining the predetermined regions (106) of the substrate. 
     
     
       4. Method according to claim 1 characterised in that in step a) an auxiliary layer (3) is deposited on a primary insulative layer before the trenches (7) are formed and in that end of attack is detected on the auxiliary layer serving as a barrier layer for the etching operation. 
     
     
       5. Method according to claim 1 characterised in that the residual relief height is in the order of 1 000 Å. 
     
     
       6. Method according to claim 1 characterised in that the chemical etching with end of attack detection is plasma etching. 
     
     
       7. Method according to claim 4 characterised in that step a) includes the formation on the semiconductor substrate of a primary oxide layer (2) before deposition of the auxiliary layer (3) and in that in step d) the auxiliary layer (3) and the primary layer (2) are removed after chemical etching. 
     
     
       8. Method according to claim 1 characterised in that the annealing is effected at a temperature in the order of 1 050° C. 
     
     
       9. Method according to any one of the preceding claims characterised in that in step b) a layered structure is deposited in the trenches (7) and on said predetermined regions (6) of the substrate, said structure including a layer (9) of insulative planarising oxide disposed between two layers (8, 10) of insulative conformal oxide and in that in step e) the partial mechanical/chemical polishing is effected on the upper layer of conformal oxide.