US5612547AExpiredUtility

Silicon carbide static induction transistor

65
Assignee: NORTHROP GRUMMAN CORPPriority: Oct 18, 1993Filed: Jun 5, 1995Granted: Mar 18, 1997
Est. expiryOct 18, 2013(expired)· nominal 20-yr term from priority
H10D 30/871H10D 30/831H10D 30/202H10D 62/8325
65
PatentIndex Score
26
Cited by
28
References
8
Claims

Abstract

A static induction transistor fabricated of silicon carbide, preferably 6H polytype, although any silicon carbide polytype may be used. The preferred static induction transistor is the recessed Schottky barrier gate type. Thus, a silicon carbide substrate is provided. Then, a silicon carbide drift layer is provided upon the substrate, wherein the drift layer has two spaced-apart protrusions or fingers which extend away from the substrate. Each protrusion of the drift layer has a source region of silicon carbide provided thereon. A gate material is then provided along the drift layer between the two protrusions. A conductive gate contact is provided upon the gate material and a conductive source contact is provided upon each source region. A conductive drain contact is provided along the substrate. Other gate types for the static induction transistor are contemplated. For example, a planar Schottky barrier gate may be employed. Furthermore, recessed or planar MOS gates may be utilized, as may a PN junction gate.

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. A static induction transistor comprising a substrate layer and a drift layer on the substrate layer wherein: the transistor is a recessed Schottky barrier gate type;   the substrate layer is fabricated of a heavily-doped silicon carbide having a selected conductivity type;   the drift layer is fabricated of a lightly-doped silicon carbide having the selected conductivity type provided upon the substrate layer, the drift layer having a plurality or spaced apart protrusions which extend outward from the drift layer, and   wherein the static induction transistor further comprises a plurality of source regions constructed of heavily-doped silicon carbide having the selected conductivity type, each source region being disposed upon a respective one of the protrusions of the drift layer;   a gate material provided along the drift layer between two adjacent ones of the protrusions;   a gate contact provided upon the gate material;   a drain contact provided along the substrate layer; and   source contacts provided along respective ones of the source regions.   
     
     
       2. The static induction transistor of claim 1 wherein the drift layer and source regions are formed as discrete epitaxial layers. 
     
     
       3. The static induction transistor of claim 1 wherein the drift layer and source regions are formed by ion implantation. 
     
     
       4. The static induction transistor of claim 1 wherein the substrate layer is made of n+ type silicon carbide, the drift layer is made of n- type silicon carbide, and the source regions are made of n+ type silicon carbide. 
     
     
       5. The static induction transistor of claim 1 wherein the substrate layer is made of p+ type silicon carbide, the drift layer is made of p- type silicon carbide, and the source regions are made of p+ type silicon carbide. 
     
     
       6. The static induction transistor of claim 1 wherein the gate material is one of platinum, platinum silicide, gold, molybdenum and polysilicon. 
     
     
       7. A static induction transistor comprising a substrate layer and a drift layer on the substrate layer wherein: the transistor is a planar Schottky barrier gate type;   the substrate layer is a heavily-doped silicon carbide having a selected conductivity type;   the drift layer is a lightly-doped silicon carbide having the selected conductivity type provided upon the substrate layer; and   wherein the static induction transistor further comprises spaced apart source wells of the selected conductivity type provided along the drift layer;   a layer of gate material provided upon the drift layer between two of the source wells;   a drain contact provided along the substrate layer;   source contacts provided upon respective ones of the source wells; and   a gate contact provided upon the layer of gate material.   
     
     
       8. The static induction transistor of claim 7 wherein the gate material is one of platinum, platinum silicide, gold and molybdenum.

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