US6329238B1ExpiredUtility

Method of fabricating a memory device having a long data retention time with the increase in leakage current suppressed

45
Assignee: HITACHI LTDPriority: Nov 4, 1997Filed: Nov 21, 2000Granted: Dec 11, 2001
Est. expiryNov 4, 2017(expired)· nominal 20-yr term from priority
H10D 1/692H10B 12/05H10B 12/31
45
PatentIndex Score
2
Cited by
6
References
4
Claims

Abstract

In a semiconductor memory device such as a DRAM, a conductive film is arranged on the rim portion of a isolation insulating film in opposition to a semiconductor substrate with a thin insulating film in between. This conductive film is electrically connected to a lower electrode of a storage capacitor. This novel arrangement can control the location of electrical pn junction independently of the location of metallurgical pn junction, thereby realizing a semiconductor memory device having a long data retention time with the increase in leakage current suppressed.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A semiconductor memory device fabricating method comprising the steps of: 
       forming a groove in a semiconductor substrate at a predetermined location;  
       forming an insulating film all over a resultant surface of said semiconductor substrate;  
       forming selectively a conductive film on a portion of said insulating film, said portion being formed on inner side walls of said groove;  
       forming a separation region by filling said groove with a second insulating film;  
       forming a metal oxide semiconductor transistor on the surface of a desired region other than said separation region on said semiconductor substrate;  
       forming a lower electrode of a storage capacitor, said lower electrode being electrically connected to one of a pair of diffused layers of said metal oxide semiconductor transistor having a conductor type reverse to that of said semiconductor substrate and to said conductive film, said lower electrode extending over said metal oxide semiconductor transistor and said separation region; and  
       forming a dielectric film of said storage capacitor and an upper electrode of said storage capacitor on said lower electrode in a stacked manner.  
     
     
       2. The semiconductor memory device fabricating method according to claim  1 , said insulating film is formed all over said resultant surface of said semiconductor substrate by thermally oxidizing an exposed surface of said semiconductor substrate. 
     
     
       3. The semiconductor memory device fabricating method according to claim  1 , wherein said conductive film is selectively formed by forming said conductive film all over the resultant surface of said semiconductor substrate and then etching the formed conductive film by anisotropic etching. 
     
     
       4. The semiconductor memory device fabricating method according to claim  1 , wherein said conductive film is a polycrystalline silicon film formed by chemical vapor deposition.

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