P
US6790699B2ExpiredUtilityPatentIndex 72

Method for manufacturing a semiconductor device

Assignee: BOSCH GMBH ROBERTPriority: Jul 10, 2002Filed: Jul 10, 2002Granted: Sep 14, 2004
Est. expiryJul 10, 2022(expired)· nominal 20-yr term from priority
Inventors:VOSSENBERG HEINZ-GEORGFREY WILHELM
B81C 1/00246B81B 2201/0235B81C 1/00801B81C 2203/0136B81B 2201/0264B81C 2203/0735
72
PatentIndex Score
10
Cited by
28
References
26
Claims

Abstract

A method for manufacturing a semiconductor device includes the steps of providing a substrate, depositing a monocrystalline sacrificial layer onto the substrate, depositing a monocrystalline function layer onto the sacrificial layer, and removing at least part of the sacrificial layer after the function layer depositing step.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A method for manufacturing a semiconductor device, comprising the steps of: 
       providing a substrate;  
       depositing a monocrystalline sacrificial layer onto the substrate;  
       depositing a monocrystalline function layer onto the sacrificial layer; and  
       removing at least part of the sacrificial layer after the function layer depositing step.  
     
     
       2. The method according to  claim 1 , wherein the substrate includes silicon. 
     
     
       3. The method according to  claim 1 , wherein the sacrificial layer includes Si x Ge y . 
     
     
       4. The method according to  claim 1 , further comprising the steps of: 
       depositing a masking layer on the substrate before the sacrificial layer depositing step; and  
       selectively removing a portion of the masking layer to expose the substrate in a first predetermined pattern before the sacrificial layer depositing step;  
       wherein the sacrificial layer is deposited in the sacrificial layer depositing step on the substrate in accordance with the first predetermined pattern.  
     
     
       5. The method according to  claim 4 , wherein the portion of the masking layer is removed in the masking layer selective removing step by photolithography. 
     
     
       6. The method according to  claim 4 , wherein the masking layer selective removing step includes the substeps of: 
       applying a photoresist to the masking layer;  
       exposing the photoresist in accordance with the first predetermined pattern;  
       developing the exposed photoresist to expose the masking layer in accordance with the first predetermined pattern; and  
       removing the exposed masking layer.  
     
     
       7. The method according to  claim 6 , wherein the masking layer selective removing step includes the substep of removing the photoresist from the masking layer after the masking layer removing step. 
     
     
       8. The method according to  claim 1 , further comprising the step of planarizing the function layer after the function layer depositing step. 
     
     
       9. The method according to  claim 4 , further comprising the step of removing a remaining portion of the masking layer after the sacrificial layer depositing step. 
     
     
       10. The method according to  claim 9 , wherein the function layer is deposited in the function layer depositing step after the remaining portion of the masking layer removing step. 
     
     
       11. The method according to  claim 10 , further comprising the step of selectively removing a portion of the function layer in accordance with a second predetermined pattern. 
     
     
       12. The method according to  claim 11 , wherein the function layer is selectively removed in the function layer selective removing step by photolithography. 
     
     
       13. The method according to  claim 11 , wherein the function layer selective removing step includes the substeps of: 
       applying a photoresist to the function layer;  
       exposing the photoresist in accordance with the second predetermined pattern;  
       developing the exposed photoresist to expose the function layer in accordance with the second predetermined pattern; and  
       removing the exposed function layer.  
     
     
       14. The method according to  claim 13 , further comprising the step of removing the photoresist from a remaining portion of the function layer. 
     
     
       15. The method according to  claim 13 , wherein the exposed function layer removing step includes trench etching. 
     
     
       16. The method according to  claim 13 , wherein the exposed function layer is removed in the exposed function layer removing step at least to a depth to the sacrificial layer. 
     
     
       17. A method for manufacturing a semiconductor device, comprising the steps of: 
       providing a substrate;  
       depositing a monocrystalline sacrificial layer onto the substrate;  
       depositing a monocrystalline function layer onto the sacrificial layer;  
       removing at least part of the sacrificial layer after the function layer depositing step;  
       applying a photoresist to the function layer;  
       exposing the photoresist in accordance with the second predetermined pattern;  
       developing the exposed photoresist to expose the function layer in accordance with the second predetermined pattern;  
       removing the exposed function layer; and  
       removing substantially all of the sacrificial layer after the exposed function layer removing step.  
     
     
       18. The method according to  claim 11 , further comprising the step of depositing a sealing layer on the function layer after the function layer selective removing step. 
     
     
       19. The method according to  claim 1 , wherein the semiconductor device includes at least one of an acceleration sensor and a pressure sensor. 
     
     
       20. The method according to  claim 4 , further comprising the step of applying an isolation layer on the sacrificial layer and the masking layer. 
     
     
       21. The method according to  claim 20 , further comprising the step of selective removing a portion of the isolation layer. 
     
     
       22. The method according to  claim 21 , wherein the isolation layer is selectively removed in the isolation layer selective removing step by photolithography. 
     
     
       23. The method according to  claim 21 , wherein the isolation layer selective removing step includes the substeps of: 
       applying a photoresist to the isolation layer;  
       exposing the photoresist in accordance with a third predetermined pattern;  
       developing the exposed photoresist to expose the isolation layer in accordance with the third predetermined pattern; and  
       removing the exposed isolation layer.  
     
     
       24. The method according to  claim 23 , wherein the sacrificial layer is exposed through the isolation layer in accordance with the third predetermined pattern, the method further comprising the step of epitaxially growing a second monocrystalline layer on the exposed sacrificial layer in accordance with the third predetermined pattern. 
     
     
       25. The method according to  claim 1 , further comprising: 
       performing a back-end etching of the sacrificial layer with an etchant that is not harmful to a metallization of an integrated circuit on the substrate.  
     
     
       26. The method according to  claim 25 , wherein the etchant includes H 2 O 2 .

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