US7199469B2ExpiredUtilityA1
Semiconductor device having stacked semiconductor chips sealed with a resin seal member
Est. expiryOct 16, 2020(expired)· nominal 20-yr term from priority
Inventors:Toru IshidaTetsuharu UrawaFujio ItoTomoo MatsuzawaKazunari SuzukiAkihiko KameokaHiromichi SuzukiTakuji Ide
H10W 90/756H10W 90/732H10W 90/20H10W 90/00H10W 74/00H10W 72/07553H10W 72/5522H10W 72/5473H10W 72/5449H10W 72/5366H10W 72/5363H10W 72/951H10W 72/934H10W 72/932H10W 72/884H10W 72/537H10W 72/536H10W 72/075H10W 72/073H10W 72/59H10W 90/811H10W 72/90H10W 72/00
61
PatentIndex Score
12
Cited by
48
References
4
Claims
Abstract
The cost of a semiconductor device is to be reduced. An electrical connection between a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip is made through an inner lead portion of a lead disposed at a position around the first semiconductor chip and two bonding wires.
Claims
exact text as granted — not AI-modified1. A semiconductor device comprising:
a first semiconductor chip having on one main surface thereof a control circuit, a first bonding pad, and a plurality of second bonding pads;
a second semiconductor chip having on one main surface thereof a memory circuit and a third bonding pad and disposed on the one main surface of the first semiconductor chip, the memory circuit being controlled in accordance with a control signal generated in the control circuit on the first semiconductor chip;
a first lead having an inner lead portion and an outer lead portion integral with the inner lead portion, the inner lead portion being disposed at a position around the first semiconductor chip;
a plurality of second leads each having an inner lead portion and an outer lead portion integral with the inner lead portion, the inner lead portion being disposed at a position around the first semiconductor chip;
a first bonding wire for connecting the first bonding pad on the first semiconductor chip with the inner lead portion of the first lead;
a plurality of second bonding wires for connecting the plural second bonding pads on the first semiconductor chip with the inner lead portions of the plural second leads;
a third bonding wire for connecting the third bonding pad on the second semiconductor chip with the inner lead portion of the first lead; and
a resin seal member for sealing the first and second semiconductor chips, the first, second and third bonding wires, and the inner lead portions of the first and second leads,
wherein the control signal generated in the control circuit is outputted from the first bonding pad on the first semiconductor chip and is inputted to the third bonding pad on the second semiconductor chip through the first bonding wire, the first lead and the third bonding wire.
2. A semiconductor device according to claim 1 , wherein the second semiconductor chip is formed in a plane size smaller than that of the first semiconductor chip.
3. A semiconductor device according to claim 1 , wherein another main surface of the second semiconductor chip opposed to the one main surface thereof is disposed on the one main surface of the first semiconductor chip so as to be facing the one main surface of the first semiconductor chip.
4. A semiconductor device according to claim 1 , wherein the first and third bonding wires are connected to the same surface of the first lead.Cited by (0)
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References (0)
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