Method of forming a semiconductor layer using a photomask reticle having multiple versions of the same mask pattern with different biases
Abstract
A method of forming a semiconductor layer of a semiconductor device including interposing a reticle between an energy source and a semiconductor wafer, the reticle including at least two duplicate mask patterns each having a different bias, and passing energy through an opening in a shutter and through one of the at least two duplicate mask patterns using the energy source to form an image on the semiconductor wafer. The one of the at least two duplicate mask patterns is chosen based on a required bias. The at least two duplicate mask patterns are disposed in a side by side relationship to one another and extend parallel or transverse to the shutter opening.
Claims
exact text as granted — not AI-modified1. A method of forming a semiconductor layer of a semiconductor device comprising the steps of:
interposing a reticle between an energy source and a semiconductor wafer, the reticle comprising at least two duplicate mask patterns each having a different bias; and
passing energy through an opening in a shutter and through one of the at least two duplicate mask patterns using the energy source to form an image on the semiconductor wafer, the one of the at least two duplicate mask patterns being chosen based on a required bias, the at least two duplicate mask patterns disposed in a side by side relationship to one another and extending parallel to the shutter opening.
2. The method of claim 1 , further comprising etching the semiconductor wafer using the image formed on the semiconductor wafer to form the semiconductor layer.
3. The method of 1 , wherein the at least two duplicate mask patterns comprises a first mask pattern, a second mask pattern and a third mask pattern, each of the first mask pattern, second mask pattern and third mask pattern having a different bias.
4. The method of claim 3 , wherein the first mask pattern is not biased, the second mask pattern has a negative bias, and the third mask pattern has a positive bias.
5. The method of claim 1 , wherein the energy source is a stepper.
6. A method of forming a semiconductor layer of a semiconductor device comprising the steps of:
interposing a reticle between an energy source and a semiconductor wafer, the reticle comprising at least two duplicate mask patterns each having a different bias; and
passing energy through an opening in a shutter and through one of the at least two duplicate mask patterns using the energy source to form an image on the semiconductor wafer, the one of the at least two duplicate mask patterns being chosen based on a required bias, the at least two duplicate mask patterns disposed in a side by side relationship to one another and extending transverse to the shutter opening.
7. The method of claim 6 , further comprising etching the semiconductor wafer using the image formed on the semiconductor wafer to form the semiconductor layer.
8. The method of 6 , wherein the at least two duplicate mask patterns comprises a first mask pattern, a second mask pattern and a third mask pattern, each of the first mask pattern, second mask pattern and third mask pattern having a different bias.
9. The method of claim 8 , wherein the first mask pattern is not biased, the second mask pattern has a negative bias, and the third mask pattern has a positive bias.
10. The method of claim 6 , wherein the energy source is a stepper.Join the waitlist — get patent alerts
Track US7435533B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.