Evaluation method of fine pattern feature, its equipment, and method of semiconductor device fabrication

Abstract

Equipment extracts components of spatial frequency that need to be evaluated in manufacturing a device or in analyzing a material or process out of edge roughness on fine line patterns and displays them as indexes. The equipment acquires data of edge roughness over a sufficiently long area, integrates components corresponding to a spatial frequency region being set on a power spectrum by the operator, and displays them on a length measuring SEM. Alternatively, the equipment divides the edge roughness data of the sufficiently long area, computes long-period roughness and short-period roughness that correspond to an arbitrary inspection area by performing statistical processing and fitting based on theoretical calculation, and displays them on the length measuring SEM.

1. An evaluation method of a semiconductor device, comprising the steps of;
 scanning a semiconductor device including a pattern with an electron beam irradiating thereon, detecting secondary electrons emitted from the semiconductor device or reflected electrons, and acquiring an information of a two-dimensional distribution of an intensity of the electrons; 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 discrete Fourier transforming the roughness data; and 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern features, 
 wherein the index is at least one or more values selected from among the total value of the square values, a square root of the total value, two times the square root of the total value, three times the square root of the total value, and six times the square root of the total value. 
 
   
   
     2. An evaluation method of a semiconductor device, comprising the steps of:
 scanning a semiconductor device including a pattern with an electron beam irradiating thereon, detecting secondary electrons emitted from the semiconductor device or reflected electrons, and acquiring an information of a two-dimensional distribution of an intensity of the electrons; 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 discrete Fourier transforming the roughness data; and 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature, 
 wherein an upper limit or lower limit of the predetermined range of frequency is specified by inputs or set up in advance and is an inverse of a gate width of a transistor that is made. 
 
   
   
     3. A fabrication method of a semiconductor device including a step of inspecting a semiconductor wafer on which a pattern is formed, comprising the steps of:
 detecting secondary electrons emitted from the semiconductor device or reflected electrons by scanning a semiconductor wafer including a pattern with an electron beam irradiating thereon, acquiring an information of a two-dimensional distribution of an intensity of the electrons, 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 calculating a critical dimension value and deviation of the data; 
 discrete Fourier transforming the roughness data; 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature; and 
 deciding to pass or fail the semiconductor wafer if the critical dimension value, the deviation and the index meet the requirement of the standard values specified in advance, and 
 displaying a diagram in which absolute values of Fourier coefficients obtained by Fourier transforming the roughness data or squares of absolute value of Fourier coefficients are plotted versus the frequency, 
 wherein if the critical dimension value, the deviation and the index meet the requirement, the wafer is transferred to a next semiconductor fabrication process, and 
 wherein if the critical dimension value, the deviation and the index do not meet the requirement, the wafer is transferred to a reformation process of the pattern of the wafer. 
 
   
   
     4. The evaluation method of the semiconductor device, according to  claim 3 , further comprising the step of
 displaying above the diagram a specific frequency region that the operator specified by inputs. 
 
   
   
     5. An evaluation method of a semiconductor device, comprising the steps of:
 scanning a semiconductor device including a pattern with an electron beam irradiating thereon, detecting secondary electrons emitted from the semiconductor device or reflected electrons, and acquiring an information of a two-dimensional distribution of an intensity of the electrons; 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 discrete Fourier transforming the roughness data; 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature; and 
 calculating a square of an absolute value of the Fourier series that is obtained by Fourier transforming the roughness data of the pattern edges or the roughness data of pattern dimensions, namely a power spectrum P (f), as an index representing characteristics of the evaluation target pattern feature and presenting a menu so that the operator can select any of a σ c 2 that is a total of all the P (f) that satisfy a specific integration region of the spatial frequency f (from a μm−1 to b μm−1), σ c, 2 σ c, 3 σ c and 6 σ c to urge the operator to selection. 
 
   
   
     6. A fabrication method of a semiconductor device including a step of inspecting a semiconductor wafer on which a pattern is formed, comprising the steps of:
 detecting secondary electrons emitted from the semiconductor device or reflected electrons by scanning a semiconductor wafer including a pattern with an electron beam irradiating thereon, acquiring an information of a two-dimensional distribution of an intensity of the electrons, 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 calculating a critical dimension value and deviation of the data; 
 discrete Fourier transforming the roughness data; 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature; and 
 deciding to pass or fail the semiconductor wafer if the critical dimension value, the deviation and the index meet the requirement of the standard values specified in advance, 
 wherein if the critical dimension value, the deviation and the index meet the requirement, the wafer is transferred to a next semiconductor fabrication process, and 
 wherein if the critical dimension value, the deviation and the index don't meet the requirement, the wafer is transferred to a reformation process of the pattern of the wafer, and 
 wherein an upper limit or lower limit of the predetermined range of frequency is specified by inputs or set up in advance and is an inverse of a gate width of a transistor that is made. 
 
   
   
     7. An evaluation method of a semiconductor device, comprising the steps of:
 detecting secondary electrons emitted from the semiconductor device or reflected electrons by scanning a semiconductor wafer including a pattern with an electron beam irradiating thereon, acquiring an information of a two-dimensional distribution of an intensity of the electrons, 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 calculating a critical dimension value and deviation of the data; 
 discrete Fourier transforming the roughness data; 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature; 
 deciding to pass or fail the semiconductor wafer if the critical dimension value. the deviation and the index meet the requirement of the standard values specified in advance; and 
 displaying a diagram in which absolute values of Fourier coefficients obtained by Fourier transforming the roughness data or squares of absolute value of Fourier coefficients are plotted versus the frequency, 
 wherein if the critical dimension value, the deviation and the index meet the requirement, the wafer is transferred to a next semiconductor fabrication process, and 
 wherein if the critical dimension value, the deviation and the index do not meet the requirement, the wafer is transferred to a reformation process of the pattern of the wafer. 
 
   
   
     8. The fabrication method of the semiconductor device, according to  claim 7 , further comprising the step of:
 displaying above the diagram a specific frequency region that the operator specified by inputs. 
 
   
   
     9. An evaluation method of a semiconductor device, comprising the steps of:
 detecting secondary electrons emitted from the semiconductor device or reflected electrons by scanning a semiconductor wafer including a pattern with an electron beam irradiating thereon, acquiring an information of a two-dimensional distribution of an intensity of the electrons; 
 measuring positions of points constituting a boundary of the pattern at a constant interval of 10 nm or less along a longitudinal direction and at 2 μm or more along the longitudinal direction to generate roughness data of the pattern; 
 calculating a critical dimension value and deviation of the data; 
 discrete Fourier transforming the roughness data; 
 adding the square values of the absolute values of Fourier coefficients, acquired by the discrete Fourier transformation, within a predetermined range of frequency thereon, outputting an index representing characteristics of the pattern feature; 
 deciding to pass or fail the semiconductor wafer if the critical dimension value, the deviation and the index meet the requirement of the standard values specified in advance; and 
 calculating a square of an absolute value of the Fourier series that is obtained by Fourier transforming the roughness data of the pattern edges or the roughness data of pattern dimensions, namely a power spectrum P (f), as an index representing characteristics of the evaluation target pattern feature and presenting a menu so that the operator can select any of σ c2 that is a total of all the P (f) that satisfy a specific integration region of the spatial frequency f (from a μm−1 to b μm−1), σ c, 2 σ c, 3 σ c and 6 σ c to urge the operator to make a selections, 
 wherein if the critical dimension value, the deviation and the index meet the requirement, the wafer is transferred to a next semiconductor fabrication process, and 
 wherein if the critical dimension value, the deviation and the index do not meet the requirement, the wafer is transferred to a reformation process of the pattern of the wafer.