P
US7745244B2ActiveUtilityPatentIndex 62

Pin substrate and package

Assignee: FAIRCHILD SEMICONDUCTORPriority: Jun 23, 2008Filed: Jun 23, 2008Granted: Jun 29, 2010
Est. expiryJun 23, 2028(~2 yrs left)· nominal 20-yr term from priority
Inventors:YUAN ZHONGFALIU YONGLIU YUMINQIAN QIUXIAO
H10W 90/754H10W 90/734H10W 90/732H10W 90/724H10W 74/15H10W 74/00H10W 72/5525H10W 72/5522H10W 72/5449H10W 72/5363H10W 72/884H10W 72/536H10W 72/0198H10W 70/095H10W 70/635H05K 2201/10378H05K 2201/10287H05K 3/4038Y10T29/49158H05K 3/3436H05K 2203/0235
62
PatentIndex Score
4
Cited by
11
References
15
Claims

Abstract

A semiconductor die package. Embodiments of the package can include a substrate with solid conductive pins disposed throughout. A semiconductor die can be attached to a surface of the substrate. Electrical connection to the semiconductor die can be provided by the solid conductive pins.

Claims

exact text as granted — not AI-modified
1. A method of forming a substrate for use in a semiconductor package, the method comprising:
 inserting a plurality of conductive wires into an alignment fixture; 
 placing at least a portion of the plurality of conductive wires and at least a portion of the alignment fixture in a mold, wherein the mold is separate from the alignment fixture; 
 filling the mold with a molding compound; 
 curing the molding compound to create a pre-substrate block; and 
 cutting the pre-substrate block, wherein cutting the pre-substrate block comprises cutting the plurality of conductive wires. 
 
   
   
     2. The method of  claim 1  wherein the mold is in the shape of a square cylinder. 
   
   
     3. The method of  claim 1  wherein the mold is in the shape of a round cylinder. 
   
   
     4. The method of  claim 1  wherein the molding compound comprises an epoxy molding compound. 
   
   
     5. The method of  claim 1  wherein each wire in the plurality of conductive wires includes a first end surface and a second end surface, and the molding compound comprises a first and second surface after cutting the pre-substrate block, further wherein the second surface of the molding compound is substantially co-planar with the second end surface of each wire in the plurality of conductive wires, and the first surface of the molding compound is substantially co-planar with the first end surface of each wire in the plurality of conductive wires. 
   
   
     6. The method of  claim 1  wherein each wire in the plurality of conductive wires comprises copper. 
   
   
     7. The method of  claim 1  wherein each wire in the plurality of conductive wires comprises gold. 
   
   
     8. The method of  claim 6 , wherein each wire in the plurality of conductive wires comprises a solid conducting material. 
   
   
     9. The method of  claim 7 , wherein each wire in the plurality of conductive wires comprises a solid conducting material. 
   
   
     10. The method of  claim 1 , wherein the alignment fixture includes a top plate having holes and a bottom plate having holes. 
   
   
     11. A method of forming a substrate for use in a semiconductor package, the method comprising:
 placing a plurality of conductive wires in a mold, wherein the placing a plurality of conductive wires in a mold includes placing the plurality of conductive wires within an alignment fixture, wherein the alignment fixture includes a top plate having holes and a bottom plate having holes, wherein the mold includes a slot, the method further comprising putting the top plate within the slot; 
 filling the mold with a molding compound; 
 curing the molding compound to create a pre-substrate block; and 
 cutting the pre-substrate block. 
 
   
   
     12. The method of  claim 10 , wherein the placing the at least a portion of the plurality of conductive wires within the alignment fixture comprises:
 inserting top portions of the plurality of conductive wires into the holes in the top plate; 
 inserting bottom portions of the plurality of conductive wires into the holes in the bottom plate; 
 melting the bottom portions of the plurality of conductive wires to form flash balls; and 
 moving the top plate and the bottom plate outward. 
 
   
   
     13. The method of  claim 10 , wherein the top plate has a top plate inner side, and the bottom plate has a bottom plate inner side, further wherein both the top plate inner side and the bottom plate inner side are coated with a release layer. 
   
   
     14. The method of  claim 12 , wherein the top plate and the bottom plate are slidably coupled to one or more guides. 
   
   
     15. The method of  claim 14 , wherein the top plate is a first top plate, the method further comprising:
 bending the top portions of the plurality of conductive wires; 
 attaching a second top plate to the one or more guides; 
 moving the second top plate inwards to clamp the bent top portions of the plurality of conductive wires against the first top plate.

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