Semiconductor device
Abstract
The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.
Claims
exact text as granted — not AI-modified1. A semiconductor device comprising:
a plurality of first bonding pads, each of the plurality of first bonding pads has a first metal and a plurality of second metals, each of the plurality of second metals which has a first linear pattern having a plurality of stripes with a rectangular shape having a long side and a short side in a plan view, is arranged directly under the first metal, and is connected with the first metal;
a plurality of second bonding pads, each of the plurality of second bonding pads has a third metal and a plurality of fourth metals, each of the plurality of third metals which has a second linear pattern having a plurality of stripes with a rectangular shape having a long side and a short side in a plan view, is arranged directly under the third metal, and is connected with the third metal concerned; and
a passivation film which covers a first side wall and a first top surface of the first metal of each of the plurality of first bonding pads and a second side wall end a second top surface of the third metal of each of the plurality of second bonding pads and has a plurality of first openings and a plurality of second openings, each of the plurality of first openings exposing a part of the first top surface of the first metal of each of the plurality of first bonding pads, each of the plurality of second opening exposing a part of the second top surface of the third metal of each of the plurality of second bonding pads,
wherein in the plan view, the first bonding pads are arranged uniformly and in order along a first long-side direction of the second metal,
wherein in the plan view, the second bonding pads are arranged uniformly and in order along a second long-side direction of the fourth metal, the second long-side direction being perpendicular to the first long-side direction,
wherein width W and interval D in a bottom of the second metals satisfy a relation:
W≦D≦ 2 W,
wherein in the plan view, a first input buffer and a first output buffer are formed below each of the plurality of first bonding pads, each of the first input bluffer and the first output buffer including a first transistor, the first input buffer receiving a first signal from the first bonding pad and outputting the first signal to an internal circuit, the first output buffer receiving a second signal from the internal circuit and outputting the second signal to the first bonding pad, and
wherein in the plan view, a second input buffer and a second output buffer are formed below each of the plurality of second bonding pads, each of the second input buffer and the second output buffer including a second transistor, the second input buffer receiving a third signal from the second bonding pad and outputting the second signal to the internal circuit, the second output buffer receiving a fourth signal from the internal circuit and outputting the fourth signal to the second bonding pad.
2. The semiconductor device according to claim 1 , wherein each of the plurality of first bonding pads has a fifth metal which is arranged under the plurality of second metals and is connected with the plurality of second metals concerned, and
wherein the first metal is composed of aluminum and each of the plurality of second metals is composed of tungsten.
3. The semiconductor device according to claim 1 , wherein the first metal of each of the plurality of first bonding pads is probed by advancing a first probe needle in a direction perpendicular to the first long-side direction of the second metal, and
wherein the third metal of each of the plurality of second bonding pads is probed by advancing a second probe needle in a direction perpendicular to the second long-side direction of the fourth metal.
4. The semiconductor device according to claim 1 , further comprising:
a plurality of power supply wirings which underlap the plurality of first bonding pads and the plurality of second bonding pads in plan view,
wherein in the plan view, the plurality of first bonding pads are arranged along a first side being one of four sides surrounding around the semiconductor device, and
wherein in the plan view, the plurality of second bonding pads are arranged along a second side being another of the four sides surrounding around the semiconductor device.
5. A semiconductor device comprising:
a plurality of bonding pads, each of the plurality of bonding pads has a first metal and a plurality of second metals, each of the plurality of second metals which has a linear pattern having a plurality of stripes with a rectangular shape having a long side and a short side in a plan view, is arranged directly under the first metal, and is connected with the first metal; and
a passivation film which covers a side wall and a top surface of the first metal of each of the plurality of bonding pads and has a plurality of openings, each of the plurality of openings exposing a part of the top surface of the first metal of each of the plurality of bonding pads,
wherein in the plan view, the bonding pads are arranged uniformly and in order along a long-side direction of the second metal, and
wherein in the plan view and in the long-side direction, a first width of each of the plurality of openings is smaller than a second width of each of the plurality of second metals of each of the plurality of bonding pads, and the second width of each of the plurality of second metals of each of the plurality of bonding pads is smaller than a third width of the first metal of each of the plurality of bonding pads,
wherein width W and interval D in a bottom of the second metals satisfy a relation:
W≦D≦ 2 W , and
wherein in the plan view, an input buffer and an output buffer are formed below each of the plurality of bonding pads each of the input buffer and the output buffer including a transistor, the input buffer receiving a first signal from the bonding pad and outputting the first signal to an internal circuit, the output buffer receiving a second signal from the internal circuit and outputting the second signal to the bonding pad.
6. The semiconductor device according to claim 5 , wherein each of the plurality of bonding pads has a third metal which is arranged under the plurality of second metals and is connected with the plurality of second metals concerned, and
wherein the first metal is composed of aluminum and each of the plurality of second metals is composed of tungsten.
7. The semiconductor device according to claim 5 , wherein the first metal of each of the plurality of bonding pads is probed by advancing a probe needle in a direction perpendicular to the long-side direction of the second metal.
8. The semiconductor device according to claim 5 , wherein in the plan view and in a first direction perpendicular to the long-side direction, a fourth width of each of the plurality of openings is smaller than a fifth width of an arrangement region of the plurality of second metals of the plurality of bonding pads, and the fifth width of the arrangement region of the plurality of second metals of the plurality of bonding pads is smaller than a sixth width of the first metal of each of the plurality of bonding pads.
9. A semiconductor device comprising:
a plurality of bonding pads, each of the plurality of bonding pads has a first metal and a plurality of second metals, each of the plurality of second metals which has a linear pattern having a plurality of stripes with a rectangular shape haying a long side and a short side in a plan view, is arranged directly under the first metal, and is connected with the first metal; and
a passivation film which covers a side wall and a top surface of the first metal of each of the plurality of bonding pads and has a plurality of openings, each of the plurality of openings exposing a part of the top surface of the first metal of each of the plurality of bonding pads,
wherein in the plan view, the bonding pads are arranged uniformly and in order along a long-side direction of the second metal,
wherein the first metal has a protruded portion protruding from the first metal to an internal circuit of the semiconductor device, and
wherein a protruded direction of the protruded portion is perpendicular to the long-side direction,
wherein width W and interval D in a bottom of the second metals satisfy a relation:
W≦D≦ 2 W , and
wherein in the plan view, an input buffer and an output buffer are formed below each of the plurality of bonding pads, each of the input buffer and the output buffer including a transistor, the input buffer receiving a first signal from the bonding pad and outputting the first signal to the internal circuit, the output buffer receiving a second signal from the internal circuit and outputting the second signal to the bonding pad.
10. The semiconductor device according to claim 9 , wherein each of the plurality of bonding pads has a third metal which is arranged under the plurality of second metals and is connected with the plurality of second metals concerned, and
wherein the first metal is composed of aluminum and each of the plurality of second metals is composed of tungsten.
11. The semiconductor device according to claim 9 , wherein the first metal of each of the plurality of bonding pads is probed by advancing a probe needle in a direction perpendicular to the long side direction of the second metal.Cited by (0)
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