P
US8189344B2ActiveUtilityPatentIndex 84

Integrated circuit package system for stackable devices

Assignee: LEE SANG-HOPriority: Jun 9, 2008Filed: Jun 9, 2008Granted: May 29, 2012
Est. expiryJun 9, 2028(~1.9 yrs left)· nominal 20-yr term from priority
Inventors:LEE SANG HOPARK SOO-SANCHOI DAESIK
H10W 90/754H10W 90/734H10W 90/722H10W 74/00H10W 72/07511H10W 72/5434H10W 72/01551H10W 72/01225H10W 72/884H10W 72/859H10W 72/251H10W 72/222H10W 72/90H10W 72/075H10W 72/30H10W 72/29H10W 70/60H10W 99/00H10W 90/00H10W 74/121H10W 72/20H10W 74/117
84
PatentIndex Score
6
Cited by
14
References
18
Claims

Abstract

An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

Claims

exact text as granted — not AI-modified
1. A method for manufacturing an integrated circuit package system comprising:
 providing a package substrate; 
 mounting an interposer chip containing active circuitry over the package substrate; 
 attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; 
 attaching a stack connector to the conductive bump stack and the package substrate; and 
 applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed. 
 
     
     
       2. The method as claimed in  claim 1  further comprising providing an integrated circuit module having the interposer chip thereover. 
     
     
       3. The method as claimed in  claim 1  wherein attaching the stack connector includes connecting the stack connector to the conductive bump stack and the package substrate. 
     
     
       4. The method as claimed in  claim 1  further comprising connecting an external device on the stud bump end. 
     
     
       5. A method for manufacturing an integrated circuit package system comprising:
 providing a package substrate having a component side; 
 mounting an interposer chip containing active circuitry and having a chip bond pad adjacent an active chip surface over the package substrate; 
 attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; 
 attaching a stack connector to the conductive bump stack and the component side of the package substrate; and 
 applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant. 
 
     
     
       6. The method as claimed in  claim 5  further comprising providing an integrated circuit module on the package substrate having the interposer chip thereover. 
     
     
       7. The method as claimed in  claim 5  wherein attaching the stack connector includes connecting the stack connector to the package substrate and the chip bond pad without the conductive bump stack. 
     
     
       8. The method as claimed in  claim 5  wherein attaching the stack connector includes connecting the stack connector to the package substrate and the chip bond pad with the conductive bump stack. 
     
     
       9. The method as claimed in  claim 5  further comprising connecting an external device having external connectors on the stud bump end of the conductive bump stack. 
     
     
       10. An integrated circuit package system comprising:
 a package substrate; 
 an interposer chip containing active circuitry mounted over the package substrate; 
 a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; 
 a stack connector attached to the conductive bump stack and the package substrate; and 
 a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed. 
 
     
     
       11. The system as claimed in  claim 10  further comprising an integrated circuit module having the interposer chip thereover. 
     
     
       12. The system as claimed in  claim 10  wherein the stack connector is connected to the conductive bump stack and the package substrate. 
     
     
       13. The system as claimed in  claim 10  further comprising an external device connected on the stud bump end. 
     
     
       14. The system as claimed in  claim 10  wherein:
 the interposer chip containing active circuitry has a chip bond pad adjacent an active chip surface; 
 the stack connector is attached to a component side of the package substrate; and 
 the package encapsulant is over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant. 
 
     
     
       15. The system as claimed in  claim 14  further comprising an integrated circuit module on the package substrate having the interposer chip thereover. 
     
     
       16. The system as claimed in  claim 14  wherein the stack connector is connected to the package substrate and the chip bond pad without the conductive bump stack. 
     
     
       17. The system as claimed in  claim 14  wherein the stack connector is connected to the chip bond pad adjacent the conductive bump stack and the package substrate. 
     
     
       18. The system as claimed in  claim 14  further comprising an external device having an external connector connected on the stud bump end of the conductive bump stack.

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