US8253225B2ActiveUtilityA1

Device including semiconductor chip and leads coupled to the semiconductor chip and manufacturing thereof

74
Assignee: OTREMBA RALFPriority: Feb 22, 2008Filed: Feb 22, 2008Granted: Aug 28, 2012
Est. expiryFeb 22, 2028(~1.6 yrs left)· nominal 20-yr term from priority
Inventors:Ralf OtrembaMarco SeibtUwe KirchnerWolfgang PeinhopfMichael TreuAndreas SchloeglMario Feldvoss
H10W 90/756H10W 74/00H10W 72/07554H10W 72/07553H10W 72/07552H10W 72/5525H10W 72/5524H10W 72/5522H10W 72/5475H10W 72/5445H10W 72/926H10W 72/537H10W 72/527H10W 72/0198H10W 70/481H10W 70/465
74
PatentIndex Score
6
Cited by
13
References
19
Claims

Abstract

An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.

Claims

exact text as granted — not AI-modified
1. A device comprising:
 a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface opposite to the first surface; 
 a first lead electrically coupled to the control electrode; 
 a second lead electrically coupled to the first load electrode; 
 a third lead electrically coupled to the first load electrode, the third lead being separate from the second lead; and 
 a fourth lead electrically coupled to the second load electrode, at least one of the second and third leads being arranged between the first and fourth leads, 
 wherein at least one first wire electrically couples the second lead to the first load electrode, 
 wherein at least one second wire electrically couples the third lead to the first load electrode, 
 wherein the thickness of at least one first wire is smaller than the thickness of the at least one second wire, and 
 wherein the distance between the fourth lead and the lead adjacent to the fourth lead is greater than the distances between the first, second and third leads. 
 
     
     
       2. The device of  claim 1 , comprising wherein the first, second, third and fourth leads protrude from one side of the device. 
     
     
       3. The device of  claim 1 , comprising wherein the semiconductor chip is placed over a carrier with its second surface facing the carrier. 
     
     
       4. The device of  claim 3 , comprising wherein the fourth lead is contiguous with the carrier. 
     
     
       5. The device of  claim 3 , comprising wherein at least a part of the second lead is arranged between the first lead and the carrier. 
     
     
       6. The device of  claim 1 , comprising wherein the thickness of the at least one first wire is smaller than 100 μm. 
     
     
       7. The device of  claim 1 , comprising wherein the thickness of the at least one second wire is greater than 120 μm. 
     
     
       8. The device of  claim 1 , comprising wherein the semiconductor chip is a power semiconductor chip. 
     
     
       9. The device of  claim 1 , comprising wherein the semiconductor chip is a power MOSFET or an IGBT. 
     
     
       10. The device of  claim 1 , comprising wherein a voltage measuring unit is electrically coupled to the second lead. 
     
     
       11. The device of  claim 1 , comprising wherein the semiconductor chip is covered by a mold material and at least parts of the first, second, third and fourth leads are uncovered by the mold material. 
     
     
       12. The device of  claim 1 , comprising wherein the at least one first wire is exactly one first wire. 
     
     
       13. A device comprising:
 a carrier; 
 a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface opposite to the first surface, the semiconductor chip being placed over the carrier with its second surface facing the carrier; 
 a first lead electrically coupled to the control electrode; 
 a second lead electrically coupled to the first load electrode, at least a part of the second lead being arranged between the first lead and the carrier; 
 a third lead electrically coupled to the first load electrode; and 
 a fourth lead electrically coupled to the carrier, the second lead being arranged between the first lead and the fourth lead, 
 wherein a first distance between the third lead and the fourth lead adjacent to the third lead is greater than a second distance between the first lead and second lead and the first distance is greater than a third distance between the second lead and the third lead. 
 
     
     
       14. The device of  claim 13 , comprising wherein the third lead is arranged between the second lead and the fourth lead. 
     
     
       15. The device of  claim 13 , comprising wherein at least a part of the second lead is L-shaped. 
     
     
       16. The device of  claim 13 , wherein the first distance is in the range of 1.5 mm to 2.5 mm. 
     
     
       17. The device of  claim 13 , wherein the second distance and the third distance are in the range of 0.2 mm to 0.8 mm. 
     
     
       18. The device of  claim 13 , comprising wherein the thickness of the at least one first wire is smaller than 100 μm. 
     
     
       19. The device of  claim 13 , comprising wherein the thickness of the at least one second wire is greater than 120 μm.

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