US8466057B2ActiveUtilityA1

Integrated circuit packaging system with filled vias and method of manufacture thereof

42
Assignee: CHUA LINDA PEI EEPriority: Mar 24, 2011Filed: Mar 24, 2011Granted: Jun 18, 2013
Est. expiryMar 24, 2031(~4.7 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/724H10W 90/722H10W 74/00H10W 72/932H10W 72/884H10W 70/60H10W 72/5449H10W 74/117
42
PatentIndex Score
0
Cited by
7
References
20
Claims

Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a via hole in the substrate, the via hole having a top end and a bottom end with the bottom end is larger than the top end; forming a pad on the substrate, the pad encloses the top end of the via hole; and reflowing a conductive filler having higher volume than the via hole over the via hole, the conductive filler having a protrusion extending from the bottom end and the bottom end entirely overlaps at least one surface of the protrusion.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of manufacture of an integrated circuit packaging system comprising:
 providing a substrate; 
 forming a via hole in the substrate, the via hole having a top end and a bottom end with the bottom end is larger than the top end; 
 forming a pad on the substrate, the pad encloses the top end of the via hole; 
 forming a conformal shell in the via hole, the conformal shell in direct contact with the substrate; and 
 reflowing a conductive filler having higher volume than the via hole and in direct contact with the conformal shell, the conductive filler having a protrusion extending from the bottom end and the bottom end entirely overlaps at least one surface of the protrusion. 
 
     
     
       2. The method as claimed in  claim 1  wherein forming the via hole in the substrate includes forming the via hole having an interior wall tapered smoothly from the bottom end with a flat circular or oval shape to the top end with a flat circular or oval shape. 
     
     
       3. The method as claimed in  claim 1  wherein forming the via hole in the substrate includes forming the via hole having a narrow channel from the top end extending downwards into a wider portion adjacent to the bottom end. 
     
     
       4. The method as claimed in  claim 1  wherein reflowing the conductive filler includes forming the protrusion having a polygon-base dome shape or a hemisphere shape. 
     
     
       5. The method as claimed in  claim 1  further comprising forming a further via hole in the substrate, the bottom end of the further via hole larger than the bottom end of the via hole. 
     
     
       6. A method of manufacture of an integrated circuit packaging system comprising:
 providing a substrate; 
 forming a via hole in the substrate, the via hole having a top end and a bottom end with the bottom end is larger than the top end; 
 forming a pad on the substrate, the pad encloses the top end of the via hole; 
 plating a conformal shell on an interior wall of the via hole, the conformal shell direct contact with the substrate; and 
 reflowing a conductive filler having higher volume than the via hole and in direct contact with the conformal shell, the conductive filler having a protrusion extending from the bottom end and the bottom end entirely overlaps at least one surface of the protrusion. 
 
     
     
       7. The method as claimed in  claim 6  further comprising attaching the protrusion on an external stack package for electrical connection and for a structural spacing. 
     
     
       8. The method as claimed in  claim 6  wherein reflowing the conductive filler includes forming the protrusion having a protrusion height in a range of 10 μm to 245 μm. 
     
     
       9. The method as claimed in  claim 6  wherein forming the pad on the substrate includes forming the pad larger than the top end. 
     
     
       10. The method as claimed in  claim 6  further comprising encapsulating the pad having the protrusion exposed. 
     
     
       11. An integrated circuit packaging system comprising:
 a substrate having a via hole in the substrate, the via hole having a top end and a bottom end with the bottom end is larger than the top end; 
 a pad over the top end of the via hole; 
 a conformal shell on an interior wall of the via hole, the conformal shell in direct contact with the substrate; and 
 a conductive filler filled into the via hole and in direct contact with the conformal shell, the conductive filler having a protrusion extending out of the via hole from the bottom end with the bottom end entirely overlapping at least one surface of the protrusion. 
 
     
     
       12. The system as claimed in  claim 11  wherein the via hole has a truncated cone shape. 
     
     
       13. The system as claimed in  claim 11  wherein the via hole has a step aperture shape. 
     
     
       14. The method as claimed in  claim 11  wherein the protrusion has a polygon-base dome shape or a hemisphere shape. 
     
     
       15. The system as claimed in  claim 11  wherein the substrate having a further via hole, the bottom end of the further via hole larger than the bottom end of the via hole. 
     
     
       16. The system as claimed in  claim 11  wherein:
 the conformal shell has an equal thickness on surfaces of the interior wall. 
 
     
     
       17. The system as claimed in  claim 16  wherein the protrusion is for electrical connection and for a structural spacing to an external stack package. 
     
     
       18. The system as claimed in  claim 16  wherein the protrusion having a protrusion height in a range of 10 μm to 245 μm. 
     
     
       19. The system as claimed in  claim 16  wherein the pad larger than the top end. 
     
     
       20. The system as claimed in  claim 16  further comprising: an encapsulation over the pad and the substrate having the protrusion exposed.

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