US8941183B2ActiveUtilityPatentIndex 61
Semiconductor device
Est. expiryAug 31, 2032(~6.2 yrs left)· nominal 20-yr term from priority
H10B 10/12H01L 27/1104H10D 64/01344
61
PatentIndex Score
3
Cited by
25
References
19
Claims
Abstract
There is provided a semiconductor device comprising, at least one SRAM cell, wherein the SRAM cell includes a pull-up transistor, a pull-down transistor, and a pass-gate transistor, and an inversion-layer thickness (Tinv) of a gate stack of the pass-gate transistor is different from Tinv of a gate stack of the pull-up transistor and Tinv of a gate stack of the pull-down transistor.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor device comprising:
at least one SRAM cell,
wherein the SRAM cell includes a pull-up transistor, a pull-down transistor, and a pass-gate transistor, and
an inversion-layer thickness (Tinv) of a gate stack of the pass-gate transistor is different from a Tinv of a gate stack of the pull-up transistor and Tinv of a gate stack of the pull-down transistor, and
wherein a nitrogen concentration of a gate insulating film of the pass-gate transistor is different from a nitrogen concentration of a gate insulating film of the pull-up transistor and a nitrogen concentration of a gate insulating film of the pull-down transistor.
2. The semiconductor device of claim 1 , wherein the gate insulating film of each of the transistors comprises a high-k material.
3. The semiconductor device of claim 1 , wherein an interface film is formed between a substrate and the gate insulating film of each of the transistors, and
a nitrogen concentration of the interface film of the pass-gate transistor is different from a nitrogen concentration of the interface film of the pull-up transistor and a nitrogen concentration of the interface film of the pull-down transistor.
4. The semiconductor device comprising:
at least one SRAM cell,
wherein the SRAM cell includes a pull-up transistor, a pull-down transistor, and a pass-gate transistor, and
an inversion-layer thickness (Tinv) of a gate stack of the pass-gate transistor is different from Tinv of a gate stack of the pull-up transistor and Tinv of a gate stack of the pull-down transistor, and
wherein a gate electrode of each of the transistors comprises a first metal electrode formed on the gate insulating film and a second metal electrode formed on the first metal electrode, and
a thickness of the second metal electrode of the pass-gate transistor is different from a thickness of the second metal electrode of the pull-up transistor and a thickness of the second metal electrode of the pull-down transistor.
5. The semiconductor device of claim 4 , wherein the first metal electrode of each of the transistors comprises LaO, Y2O3, Lu2O3, SrO, or a combination thereof.
6. The semiconductor device of claim 4 , wherein the second metal electrode of each of the transistors comprises TiN, TaN, or a combination thereof.
7. A semiconductor device comprising:
at least one SRAM cell, comprising:
a pull-up transistor,
a pull-down transistor, and
a pass-gate transistor,
wherein a nitrogen concentration of a gate insulating film of the pass-gate transistor is different from a nitrogen concentration of a gate insulating film of the pull-up transistor and a nitrogen concentration of a gate insulating film of the pull-down transistor.
8. The semiconductor device of claim 7 , wherein the gate insulating film of each of the transistors comprises a high-k material.
9. The semiconductor device of claim 7 , wherein:
an interface film is formed between a substrate and the gate insulating film of each of the transistors, and
a nitrogen concentration of the interface film of the pass-gate transistor is different from a nitrogen concentration of the interface film of the pull-up transistor and a nitrogen concentration of the interface film of the pull-down transistor.
10. The semiconductor device of claim 7 , wherein:
a gate electrode of each of the transistors includes a first metal electrode formed on a gate insulating film and a second metal electrode formed on the first metal electrode, and
a thickness of the second metal electrode of the pass-gate transistor is different from a thickness of the second metal electrode of the pull-up transistor and a thickness of the second metal electrode of the pull-down transistor.
11. The semiconductor device of claim 10 , wherein the first metal electrode of each of the transistors comprises LaO, Y2O3, Lu2O3, SrO, or a combination thereof.
12. The semiconductor device of claim 10 , wherein the second metal electrode of each of the transistors comprises TiN, TaN, or a combination thereof.
13. The semiconductor device of claim 7 , wherein an inversion-layer thickness (Tinv) of a gate stack of the pass-gate transistor is different from a Tinv of a gate stack of the pull-up transistor and Tinv of a gate stack of the pull-down transistor.
14. An electronic system comprising a semiconductor device, including:
at least one SRAM device comprising:
a pull-up transistor,
a pull-down transistor, and
a pass-gate transistor, wherein the nitrogen characteristics of the pass-gae transistor are different from nitrogen characteristics of the pull-up transistor and pull-down transistor;
a controller;
an input/output (I/O) device;
an interface; and
a bus configured to interconnect one or more of the controller, the I/O device, and the interface.
15. The system of claim 14 , wherein a nitrogen concentration of a gate insulating film of the pass-gate transistor is different from a nitrogen concentration of a gate insulating film of the pull-up transistor and a nitrogen concentration of a gate insulating film of the pull-down transistor.
16. The system of claim 14 , wherein the gate insulating film of each of the transistors comprises a high-k material.
17. The system of claim 14 , wherein:
an interface film is formed between a substrate and the gate insulating film of each of the transistors, and
a nitrogen concentration of the interface film of the pass-gate transistor is different from a nitrogen concentration of the interface film of the pull-up transistor and a nitrogen concentration of the interface film of the pull-down transistor.
18. The system of claim 14 , wherein:
a gate electrode of each of the transistors includes a first metal electrode formed on a gate insulating film and a second metal electrode formed on the first metal electrode, and
a thickness of the second metal electrode of the pass-gate transistor is different from a thickness of the second metal electrode of the pull-up transistor and a thickness of the second metal electrode of the pull-down transistor.
19. The system of claim 14 , wherein an inversion-layer thickness (Tinv) of a gate stack of the pass-gate transistor is different from a Tinv of a gate stack of the pull-up transistor and Tinv of a gate stack of the pull-down transistor.Cited by (0)
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