Method for manufacturing a microelectromechanical systems (MEMS) device with different electrical potentials and an etch stop
Abstract
A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor structure for a microelectromechanical systems (MEMS) device, the semiconductor structure comprising:
a first substrate region including an electrical isolation layer arranged over a top surface of the first substrate region;
a second substrate region arranged over the electrical isolation layer and including a MEMS device structure arranged within the second substrate region, the MEMS device structure including a fixed mass and a proof mass;
a dielectric region arranged over the electrical isolation layer around the fixed mass;
a fixed mass electrode arranged around the dielectric region, and extending through the second substrate region to the electrical isolation layer; and
an isolated electrode extending through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode.
2. The semiconductor structure according to claim 1 , wherein the MEMS device structure further includes:
an anchor arranged between the fixed mass electrode and the isolated electrode; and
a spring suspending the proof mass between the fixed mass electrode and the isolated electrode.
3. The semiconductor structure according to claim 1 , wherein the fixed mass electrode abuts sidewalls of the dielectric region between a top surface of the electrical isolation layer and a bottom surface of the fixed mass.
4. The semiconductor structure according to claim 1 , further including:
a first bonding structure including:
a first bonding layer arranged over a top surface of the electrical isolation layer; and
a second bonding layer arranged over a bottom surface of the second substrate region and fusion bonded to the first bonding layer at an interface between the first and second bonding layers.
5. The semiconductor structure according to claim 1 , wherein the electrical isolation layer includes one or more of silicon nitride and silicon carbide.
6. The semiconductor structure according to claim 1 , wherein one of the isolated electrode and the fixed mass electrode is associated with an in-plane sensing gap laterally arranged between the proof mass and the one of the isolated electrode and the fixed mass electrode.
7. The semiconductor structure according to claim 1 , wherein one of the isolated electrode and the fixed mass electrode is associated with an out-of-plane sensing gap vertically arranged between the proof mass and a lateral extension of the one of the isolated electrode and the fixed mass electrode.
8. The semiconductor structure according to claim 1 , further including:
a MEMS structure including the first substrate region, the second substrate region, the dielectric region, the fixed mass electrode, and the isolated electrode;
a cap structure arranged over the MEMS structure; and
a chamber arranged over the MEMS structure between the MEMS structure and the cap structure, wherein the chamber extends laterally from the fixed mass electrode to the isolation electrode.
9. The semiconductor structure according to claim 1 , further including:
a pair of fixed mass holes extending through the second substrate region, wherein the fixed mass holes of the pair are arranged on opposite sides of the dielectric region and on opposite sides of the fixed mass, and wherein the fixed mass electrode extends through the fixed mass holes of the pair; and
an electrical isolation hole extending through the second substrate region and the electrical isolation layer, wherein the proof mass is spaced between the pair of fixed mass holes and the electrical isolation hole, and wherein the isolated electrode extends through the electrical isolation hole.
10. A method for manufacturing a semiconductor structure for a microelectromechanical systems (MEMS) device, the method comprising:
providing a first substrate region and a second substrate region secured over the first substrate region, the first substrate region including an electrical isolation layer arranged over the first substrate region and a first sacrificial layer arranged over the electrical isolation layer, and the second substrate region including a MEMS device structure arranged within the second substrate region and a second sacrificial layer surrounding the MEMS device structure, wherein the MEMS device structure includes a fixed mass and a proof mass;
forming a fixed mass electrode around a fixed mass region of the first and second sacrificial layers surrounding the fixed mass, and extending through the second substrate region to the electrical isolation layer;
forming an isolated electrode extending through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode; and
removing regions of the first and second sacrificial layers surrounding the proof mass while using the fixed mass electrode as an etch stop for the fixed mass regions.
11. The method according to claim 10 , further including:
securing the second substrate region and the first substrate region by fusion bonding the first and second sacrificial layers.
12. The method according to claim 10 , further including:
providing the second substrate region with a first pair of fixed mass holes and a first electrical isolation hole, wherein the proof mass is arranged between the first pair and the first electrical isolation hole, and wherein the fixed mass is arranged between the fixed mass holes of the first pair;
providing the electrical isolation layer and the second sacrificial layer with a second electrical isolation hole, and the second sacrificial layer with a second pair of fixed mass holes; and
securing the second substrate region over the first substrate region with the first pair of fixed mass holes aligned with and abutting the second pair of fixed mass holes, and with the first electrical isolation hole aligned with and abutting the second electrical isolation hole.
13. The method according to claim 12 , further including:
forming the fixed mass electrode through the first and second pairs of fixed mass holes; and
forming the isolated electrode through the first and second electrical isolation holes.
14. The method according to claim 12 , further including:
providing the MEMS device structure with a spring connecting the proof mass to an anchor arranged between the first pair of fixed mass holes and the first electrical isolation hole; and
removing regions of the first and second sacrificial layers surrounding the proof mass and the spring.
15. The method according to claim 10 , further including:
forming the fixed mass electrode along sidewalls of the fixed mass region between a top surface of the electrical isolation layer and a bottom surface of the fixed mass.
16. The method according to claim 10 , further including:
forming the electrical isolation layer over the first substrate region as one or more of silicon nitride and silicon carbide.
17. The method according to claim 10 , further including:
forming an in-plane sensing gap laterally arranged between the proof mass and one of the isolated electrode and the fixed mass electrode.
18. The method according to claim 10 , further including:
forming an out-of-plane sensing gap vertically arranged between the proof mass and a lateral extension of one of the isolated electrode and the fixed mass electrode.
19. The method according to claim 10 , further including:
securing a cap wafer over the isolated electrode and the fixed mass electrode to form a chamber extending laterally from the fixed mass electrode to the isolation electrode.
20. A semiconductor structure for first and second microelectromechanical systems (MEMS) devices, the semiconductor structure comprising:
a first substrate region including an electrical isolation layer arranged over a top surface of the first substrate region;
a second substrate region arranged over the electrical isolation layer and including first and second MEMS device structures arranged within the second substrate region, the first and second MEMS device structures each including a fixed mass and a proof mass;
first and second dielectric regions arranged over the electrical isolation layer and corresponding to the first and second MEMS device structures, wherein the first and second dielectric regions are arranged around the fixed masses of the corresponding MEMS device structures;
first and second fixed mass electrodes extending through the second substrate region to the electrical isolation layer and corresponding to the first and second dielectric regions, wherein the first and second fixed mass electrodes are arranged around the corresponding dielectric regions; and
an isolated electrode extending through the second substrate region and the electrical isolation layer to the first substrate region between the first and second fixed mass electrodes.Cited by (0)
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