Component including two semiconductor elements, which are bonded to one another via a structured bonding layer, and method for manufacturing a component of this type

Abstract

Measures are provided for improving and simplifying metallic bonding processes which enable a reliable initiation of the bonding process and thus contribute to a uniform bonding. The present method provides a further option for using bonding layers. The method in the case of which the two semiconductor elements are bonded to one another via a bond of at least one metallic starting layer and at least one further starting layer provides that the two starting layers are structured in such a way that the layer areas which are assigned to one another have differently sized areal extents. Moreover, the layer thicknesses of the two starting layers should be selected in such a way that the layer areas which are assigned to one another meet the material ratio necessary for the bonding process.

What is claimed is: 
     
       1. A method for manufacturing a vertical hybrid integrated component, the method comprising:
 providing at least two semiconductor elements; and 
 bonding the two elements to one another via a bond of at least one metallic starting layer and at least one further starting layer, at least one of the two element surfaces to be bonded being provided with the at least one metallic starting layer, out of which at least one first layer area is structured, at least one of the two element surfaces to be bonded being provided with at least one further starting layer, out of which at least one second layer area is structured which is situated so that it forms together with the first layer area of the first starting layer a bonding layer for the two elements during the bonding process, wherein the starting layers are structured so that the layer areas which are assigned to one another have differently sized areal extents and the layer thicknesses of the two starting layers are selected so that the layer areas which are assigned to one another meet the material ratio necessary for the bonding process; 
 wherein the at least two semiconductor elements include at least one of: (i) at least two MEMS elements; at least two ASIC elements; and at least one MEMS element and at least one ASIC element, and 
 wherein the elements of the vertical hybrid integrated component are situated above one another in the form of a chip stack and are bonded to one another. 
 
     
     
       2. The method of  claim 1 , wherein each of the two element surfaces to be bonded is provided with at least one starting layer. 
     
     
       3. The method of  claim 1 , wherein the two starting layers are consecutively deposited and structured on one of the two element surfaces to be bonded. 
     
     
       4. The method of  claim 1 , wherein a contiguous layer area of the metallic starting layer is assigned multiple layer areas of the further starting layer. 
     
     
       5. The method of  claim 1 , wherein the at least one layer area is tapered upwardly. 
     
     
       6. The method of  claim 1 , wherein at least one structural element, which is not assigned a layer area of the further starting layer, is structured out of at least one starting layer and this structural element is configured as an electrode or as a standoff structure.