US9754827B1ActiveUtility

Semiconductor device and fabrication method thereof

89
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Apr 29, 2016Filed: Apr 29, 2016Granted: Sep 5, 2017
Est. expiryApr 29, 2036(~9.8 yrs left)· nominal 20-yr term from priority
H10P 70/234H10P 70/27H10D 64/0131H10D 64/0112H10W 20/077H10W 20/048H10P 70/277H01L 23/53209H01L 21/76805H01L 21/28568H01L 23/5329H01L 21/28518H01L 23/535H01L 29/665H01L 21/76895H01L 29/42344H01L 27/11568H01L 21/28052H01L 27/11573H01L 21/02063H01L 21/76814H01L 21/76834H01L 21/76886H10D 30/0212H10D 1/00H10D 30/696H10B 43/30H10B 43/40
89
PatentIndex Score
4
Cited by
4
References
20
Claims

Abstract

A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device, comprising:
 a semiconductor structure having an upper surface and a lateral surface; 
 a dielectric layer enclosing the lateral surface of the semiconductor structure and exposing the upper surface of the semiconductor structure; 
 a metal-semiconductor compound film on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film, and wherein the metal-semiconductor compound film comprising a semiconductor and a first metal; and 
 a cover layer enclosing the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposing the dielectric layer, wherein the cover layer comprises at least one of an oxide of the first metal, a nitride of the first metal, an oxynitrides of the first metal, or a carbide of the first metal. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the cover layer is substantially conformal to the portion of the surface of the metal-semiconductor compound film. 
     
     
       3. The semiconductor device of  claim 1 , wherein the metal-semiconductor compound film comprises nickel platinum silicide, the first metal being nickel. 
     
     
       4. The semiconductor device of  claim 1 , wherein a material of the cover layer comprises the oxide of the first metal and an oxide of the semiconductor. 
     
     
       5. The semiconductor device of  claim 1 , wherein a material of the cover layer comprises the nitride of the first metal and a nitride of the semiconductor. 
     
     
       6. The semiconductor device of  claim 1 , wherein a material of the cover layer comprises the oxynitrides of the first metal and an oxynitride of the semiconductor. 
     
     
       7. The semiconductor device of  claim 1 , wherein a material of the cover layer comprises the carbide of the first metal and a carbide of the semiconductor. 
     
     
       8. The semiconductor device of  claim 1 , wherein the cover layer has an opening partially exposing the portion of the surface of the metal-semiconductor compound film. 
     
     
       9. The semiconductor device of  claim 7 , further comprising:
 an inter-layered dielectric (ILD) over the dielectric layer, wherein the ILD has a through hole connecting the opening of the cover layer; and 
 a conductive contact electrically connected to the metal-semiconductor compound film via the through hole of the ILD and the opening of the cover layer. 
 
     
     
       10. A semiconductor device, comprising:
 a gate electrode over semiconductor substrate; 
 a metal-semiconductor compound film on the gate electrode, the metal-semiconductor layer including a first metal and silicon; 
 a dielectric layer enclosing the gate electrode and exposing a portion of a surface of the metal-semiconductor compound film; 
 a cover layer on the portion of the surface of the metal-semiconductor compound film, and exposing an upper surface of the dielectric layer, wherein the cover layer has an opening partially exposing the portion of the surface of the metal-semiconductor compound film, and wherein the cover layer includes the first metal, silicon, and at least one of nitrogen, oxygen or carbon; 
 an inter-layered dielectric (ILD) over the dielectric layer, wherein the ILD has a through hole connecting the opening of the cover layer; and 
 a conductive contact electrically connected to the metal-semiconductor compound film via the through hole of the ILD and the opening of the cover layer. 
 
     
     
       11. The semiconductor device of  claim 10 , wherein the cover layer is substantially conformal to the portion of the surface of the metal-semiconductor compound film. 
     
     
       12. The semiconductor device of  claim 10 , wherein the metal-semiconductor compound film comprises the first metal, a second metal and silicone. 
     
     
       13. The semiconductor device of  claim 11 , wherein the first metal comprises nickel, the second metal comprises platinum. 
     
     
       14. The semiconductor device of  claim 10 , wherein a material of the cover layer comprises metal oxide, metal nitride, metal oxynitride, metal carbide or a combination thereof having the first metal. 
     
     
       15. A semiconductor device, comprising:
 a semiconductor substrate having a memory region and a peripheral region; 
 a plurality of gate electrodes in the memory region and over the semiconductor substrate; 
 a plurality of metal-semiconductor compound films on the gate electrodes, respectively; 
 a dielectric layer enclosing the gate electrodes and exposing a portion of surfaces of the metal-semiconductor compound films; and 
 a plurality of cover layers on the portion of the surfaces of the metal-semiconductor compound films, wherein the plurality of cover layers include at least one of a metal oxide, a metal nitride, a metal oxynitride, or a metal carbide. 
 
     
     
       16. The semiconductor device of  claim 15 , further comprising:
 an inter-layered dielectric (ILD) over the dielectric layer; and 
 a plurality of conductive contacts through the ILD and the cover layers and electrically connected to the metal-semiconductor compound films. 
 
     
     
       17. The semiconductor device of  claim 15 , further comprising a driving circuit in the peripheral region. 
     
     
       18. The semiconductor device of  claim 15 , wherein the gate electrodes comprises a select gate and a memory gate. 
     
     
       19. The semiconductor device of  claim 15 , wherein the metal-semiconductor compound film comprises a first metal, a second metal and a semiconductor material and wherein the plurality of cover layers include at least one of the metal oxide, the metal nitride, the metal oxynitride, and the metal carbide having the first metal. 
     
     
       20. The semiconductor device of  claim 19 , wherein the first metal comprises nickel, the second metal comprises platinum, and the semiconductor material comprises silicon and wherein the plurality of cover layers further include at least one of silicon oxide, silicon nitride, silicon oxynitride, and silicon carbide.

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