Backside illuminated (BSI) image sensor with a reflector

Abstract

A backside illuminated (BSI) image sensor with a reflector is provided. A pixel sensor is arranged on a lower side of a semiconductor substrate, and comprises a photodetector arranged within the semiconductor substrate. An interconnect structure is arranged under the semiconductor substrate and the pixel sensor, and comprises an interconnect layer and a contact via extending from the interconnect layer to the pixel sensor. The reflector is arranged under the photodetector, between the interconnect layer and the photodetector, and is configured to reflect incident radiation towards the photodetector. A method for manufacturing the BSI image sensor is also provided.

What is claimed is: 
     
       1. An image sensor comprising:
 a pixel sensor arranged on a lower side of a semiconductor substrate, wherein the pixel sensor comprises a photodetector arranged within the semiconductor substrate; 
 an interconnect structure arranged under the semiconductor substrate and the pixel sensor, wherein the interconnect structure comprises an interconnect layer and a contact via extending from the interconnect layer to the pixel sensor; 
 a reflector arranged under the photodetector, between the interconnect layer and the photodetector, and configured to reflect incident radiation towards the photodetector; and 
 an isolation region extending into the lower side of the semiconductor substrate, and arranged laterally adjacent to the photodetector, wherein the reflector comprises a first segment extending laterally under the photodetector, and wherein the reflector further comprises a second segment extending into the isolation region from the first segment. 
 
     
     
       2. The image sensor according to  claim 1 , wherein the reflector is continuous between the first and second segments. 
     
     
       3. The image sensor according to  claim 1 , wherein the first segment has an upper surface facing the photodetector, and wherein the second segment extends into the isolation region in a direction orthogonal to the upper surface of the first segment. 
     
     
       4. The image sensor according to  claim 1 , wherein a lower surface of the second segment contacts an upper surface of the first segment. 
     
     
       5. The image sensor according to  claim 1 , further comprising:
 a transfer transistor arranged laterally adjacent to the pixel sensor, wherein the contact via extends to a gate of the transfer transistor. 
 
     
     
       6. An image sensor comprising:
 an interconnect structure arranged under a semiconductor substrate and comprising layers of conductive features stacked within an interlayer dielectric (ILD) region; 
 a photodetector arranged within the semiconductor substrate; and 
 a reflector arranged under the photodetector, between the interconnect structure and the photodetector, wherein the reflector is configured to reflect incident radiation towards the photodetector, and wherein the reflector has a top surface that is curved so edges of the top surface are closer to the semiconductor substrate than a center of the top surface. 
 
     
     
       7. The image sensor according to  claim 6 , further comprising:
 a transistor arranged under the semiconductor substrate, between the interconnect structure and the semiconductor substrate, wherein the transistor comprises a gate electrode, and wherein the reflector is between a bottom surface of the gate electrode and the photodetector. 
 
     
     
       8. The image sensor according to  claim 7 , further comprising:
 a dielectric layer under and contacting the semiconductor substrate, wherein the dielectric layer has a second bottom surface that is curved so edges of the second bottom surface are closer to the semiconductor substrate than a center of the second bottom surface, wherein the reflector is under and conformally contacts the second bottom surface, and wherein the reflector is conductive. 
 
     
     
       9. The image sensor according to  claim 8 , wherein the dielectric layer has a top surface that is planar and that contacts the semiconductor substrate, and wherein the edges of the second bottom surface respectively contact edges of the top surface of the dielectric layer. 
     
     
       10. The image sensor according to  claim 8 , wherein the reflector has a third bottom surface that is curved so edges of the third bottom surface are closer to the top surface of the reflector than a center of the third bottom surface. 
     
     
       11. The image sensor according to  claim 8 , wherein the reflector has a third bottom surface that is planar and that has edges spaced from the edges of the top surface of the reflector. 
     
     
       12. The image sensor according to  claim 8 , wherein the dielectric layer has a segment entirely spaced from a bulk of the dielectric layer by the reflector, wherein the segment is directly between the photodetector and the reflector, and wherein the segment defines the second bottom surface of the dielectric layer. 
     
     
       13. The image sensor according to  claim 7 , wherein the transistor comprises a source/drain region arranged in the semiconductor substrate, wherein a bottom surface of the photodetector and a bottom surface of the source/drain region are even with a bottom surface of the semiconductor substrate, and wherein the reflector is between the bottom surface of the semiconductor substrate and the bottom surface of the gate electrode. 
     
     
       14. The image sensor according to  claim 13 , wherein the transistor comprises a gate dielectric layer under and contacting the bottom surface of the semiconductor substrate, and wherein the gate electrode has a top surface that is under and contacts the gate dielectric layer. 
     
     
       15. An image sensor comprising:
 a semiconductor substrate comprising a photodetector bordering a bottom surface of the semiconductor substrate; 
 a transistor on the bottom surface of the semiconductor substrate, wherein the transistor comprises a gate dielectric layer under and contacting the bottom surface of the semiconductor substrate, and further comprises a gate electrode under and contacting the gate dielectric layer; 
 a reflector bordering the bottom surface of the semiconductor substrate, directly under the photodetector, wherein the reflector is conductive and configured to reflect incident radiation towards the photodetector, wherein the reflector extends laterally respectively from and to opposite sides of the photodetector, and wherein a top surface of the reflector is spaced over a bottom surface of the gate electrode; and 
 a shallow trench isolation (STI) region extending into the bottom surface of the semiconductor substrate, wherein the photodetector is laterally between the STI region and the gate electrode, and wherein the reflector protrudes into the STI region. 
 
     
     
       16. The image sensor according to  claim 15 , wherein the reflector comprises a first line-shaped segment and a second line-shaped segment orthogonal to the first line-shaped segment, wherein the first line-shaped segment is directly under the photodetector, and wherein the second line-shaped segment extends into the STI region from the first line-shaped segment. 
     
     
       17. The image sensor according to  claim 16 , wherein the reflector is continuous between the first and second line-shaped segments. 
     
     
       18. The image sensor according to  claim 16 , wherein the reflector is discontinuous from the first line-shaped segment to the second line-shaped segment. 
     
     
       19. The image sensor according to  claim 15 , further comprising:
 an interconnect structure under the semiconductor substrate, wherein the interconnect structure comprises a plurality of interconnect layers and a plurality via layers alternatingly stacked, and wherein the via layers comprise a contact via extending from contact with the gate electrode to contact with one of the interconnect layers. 
 
     
     
       20. The image sensor according to  claim 15 , further comprising:
 a color filter and a microlens stacked on a top surface of the semiconductor substrate, wherein the microlens is over the color filter.