Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof

Abstract

A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "collector extension region" extending relatively deep within the epitaxial layer so as to intercept the emitter current and gather it to the collector, subtracting it from dispersion toward the substrate through the adjacent isolation junctions surrounding the region of the lateral bipolar transistor. Under comparable conditions, the ratio between IcIsubstrate is incremented from about 8 to about 300 and the Early voltage from about 20V to about 100V. The V CEO , BV CBO and BV CES voltages are also advantageously increased by the presence of said "well" region formed in the collector zone.

What we claim is: 
     
       1. An integrated circuit, monolithically integrated in an epitaxial layer of lightly doped silicon of a first conductivity type grown on a monocrystalline, lightly doped silicon of a second conductivity type and comprising complementary, superficial field effect-transistors and bipolar lateral transistors .[.f.]. .Iadd.of .Iaddend.said second conductivity type, each bipolar lateral transistor of said second conductivity type being formed in a region of said epitaxial layer, electrically isolated from said substrate by a heavily doped layer of said first conductivity type formed at the bottom of said region and laterally by bottom isolation diffusions and top isolation or well diffusions merging to form walls of doped silicon of said second conductivity type extending through the entire thickness of said epitaxial layer around said region, each of said bipolar transistors comprising a heavily doped, base contact diffusion of said first conductivity type, a heavily doped emitter diffusion of said second conductivity type and heavily doped, annular collector diffusion of said second conductivity type formed around said emitter diffusion, said base contact, emitter and collector diffusions having respective profiles identical to respective diffusion profiles of source and drain regions of said complementary .[.filed.]. .Iadd.field .Iaddend.effect transistors, and characterized by comprising   at least a second annular diffusion of said second conductivity type, having the same diffusion profile of said top isolation or well diffusion of said second conductivity type and extends beyond the profile of the .[.latter,.]. .Iadd.collector diffusion, .Iaddend.deeply within said epitaxial layer, for intercepting .[.electric current.]. .Iadd.carrier flow .Iaddend.originating from said emitter diffusion and for gathering the same to the transistor's collector subtracting it from dispersion toward said isolation diffusions surrounding the transistor region.   
     
     
       2. The integrated circuit according to claim 1, wherein said substrate is a p-type substrate, said epitaxial layer is an n -  type layer, said bipolar lateral transistor is a PNP transistor and said second annular diffusion formed in the collector zone of the PNP transistor has the same diffusion profile of a p-well utilized in an n-channel field effect transistor. 
     
     
       3. The integrated circuit according to claim 2, wherein a superficial region of said second annular diffusion is boron enriched. .Iadd. 
     
     
       4.  An integrated circuit, comprising: a monocrystalline semiconductor epitaxial layer of a first conductivity type overlying a second monocrystalline semiconductor region of a second conductivity type;   an emitter region, comprising a shallow heavily-doped diffusion of said second conductivity type, formed in a portion of said epitaxial layer at a surface thereof;   a base contact region making ohmic contact to a portion of said epitaxial layer which surrounds said emitter region, and a buried layer of said first conductivity type, at the vertical boundary between said epitaxial layer and said second semiconductor region, beneath said emitter;   a collector region, substantially laterally surrounding said emitter region, and comprising a first diffusion of said second conductivity type, formed in a portion of said epitaxial layer at a surface thereof, and having approximately the same dopant diffusion profile as said shallow diffusion of said emitter region;   a second diffusion of said second conductivity type, formed in a portion of said epitaxial layer at a surface thereof; said second diffusion abutting said first diffusion and being laterally interposed between said first diffusion and said epitaxial layer; and     diffused isolation regions laterally surrounding said collector region, and extending through the full vertical thickness of said epitaxial layer. .Iaddend..Iadd.   
     
     
       5.  The integrated circuit of claim 4, wherein said first conductivity type is N-type. .Iaddend..Iadd.6. The integrated circuit of claim 4, further comprising a thick oxide layer extending across the surface of said isolated portion, and having apertures therein; and further comprising ohmic contacts to said emitter and collector regions, each extending through a respective aperture in said oxide. .Iaddend..Iadd.7. The integrated circuit of claim 4, wherein said isolation regions each include not only a down-diffusion, but also a respective up-diffusion. .Iaddend..Iadd.8. The integrated circuit of claim 4 wherein said collector 
     
     
        region completely surrounds said emitter region. .Iaddend..Iadd.9.  An integrated circuit, comprising: a substrate including at least one isolated portion of monocrystalline semiconductor material of a first conductivity type in proximity to a first surface of said substrate;   an emitter region, comprising a high concentration of dopants of a second conductivity type, formed at said first surface of said isolated portion;   a base contact region making ohmic contact to said isolated portion;   a collector region, located in proximity to said emitter region, and laterally separated therefrom by said isolated semiconductor portion, and comprising a high concentration of dopants of said second conductivity type formed at said first surface of said semiconductor portion, and having approximately the same dopant distribution profile as said emitter region; and also comprising a deep diffusion of said second conductivity type, extending into, but not through, said semiconductor portion from said first surface thereof; said deep diffusion abutting said collector region and being laterally interposed between said collector region and said isolated semiconductor portion; and   an additional diffusion of said second conductivity type, which is shallower than said deep diffusion; said additional diffusion abutting said deep diffusion and being laterally interposed between said deep     
     
     
        diffusion and said isolated semiconductor portion. .Iaddend..Iadd.10.  The integrated circuit of claim 9, wherein said first conductivity type is N-type. .Iaddend..Iadd.11. The integrated circuit of claim 9, further comprising a thick oxide layer extending across the surface of said isolated portion, and having apertures therein; and further comprising ohmic contacts to said emitter and collector regions, each extending through a respective aperture in said oxide. .Iaddend..Iadd.12. The integrated circuit of claim 9, wherein said collector region completely 
     
     
        surrounds said emitter region. .Iaddend..Iadd.13.  An integrated circuit, comprising: a substrate including at least one isolated portion of monocrystalline semiconductor material of a first conductivity type in proximity to a first surface of said substrate;   a thick oxide layer extending across the surface of said isolated portion, and having apertures therein;   an emitter region, comprising a shallow heavy diffusion of said second conductivity type formed at and in self-alignment to an emitter contact aperture of said thick oxide layer;   a base contact region, located at a respective aperture of said thick oxide layer, and making ohmic contact to said isolated portion;   a collector region, located in proximity to said emitter region, and laterally separated therefrom by said isolated semiconductor portion, and comprising a high concentration of dopants of said second conductivity type formed at and in self-alignment to a collector contact aperture of said thick oxide layer, and having approximately the same dopant distribution profile as said emitter region; and also comprising a deep diffusion of said second conductivity type, extending into, but not through, said semiconductor portion from said first surface thereof; said deep diffusion not being self-aligned to said collector contact aperture; said deep diffusion abutting said collector region and being laterally interposed between said collector region and said isolated semiconductor portion; and   an additional diffusion of said second conductivity type, which is shallower than said deep diffusion and partially coincides therewith; said additional diffusion abutting said deep diffusion and being laterally interposed between said deep diffusion and said isolated semiconductor     
     
     
        portion. .Iaddend..Iadd.14.  The integrated circuit of claim 13, wherein said first conductivity type is N-type. .Iaddend..Iadd.15. The integrated circuit of claim 13, wherein said bipolar device is fully isolated from other devices on the chip by up/down diffused isolation regions which extend through the full thickness of an epitaxial layer which is of opposite conductivity type from the up/down diffused isolation regions and from the underlying substrate. .Iaddend..Iadd.16. The integrated circuit of claim 13, wherein said bipolar device is fully isolated from other devices on the chip by junction isolation. .Iaddend..Iadd.17. The integrated circuit of claim 13, wherein said collector region completely 
     
     
        surrounds said emitter region. .Iaddend..Iadd.18.  An integrated circuit device structure, comprising: a substrate including, in proximity to a first surface thereof, at least one first portion of monocrystalline semiconductor material of a first conductivity type, at least one second portion of monocrystalline semiconductor material of a second conductivity type, and at least one isolated portion of monocrystalline semiconductor material of a first conductivity type;   at least one said first portion including therein a field-effect transistor having source/drain diffusions corresponding to a shallow heavy concentration of dopants of said second conductivity type;   at least one said second portion including therein a field-effect transistor having source/drain diffusions corresponding to a shallow heavy concentration of dopants of said first conductivity type;   and at least one said isolated portion including therein a bipolar transistor comprising: an emitter region, comprising a high concentration of dopants of a second conductivity type, formed at said first surface of said isolated portion;   a base contact region making ohmic contact to said isolated portion;   a collector region, located in proximity to said emitter region, and laterally separated therefrom by said isolated semiconductor portion, and comprising: a first diffusion corresponding to the dopant distribution profile of said source/drain diffusions in said second portion;   a deep diffusion substantially corresponding to the dopant distribution profile of said second portion; said deep diffusion abutting said collector region and being laterally interposed between said collector region and said isolated semiconductor portion: and   an additional diffusion of said second conductivity type, which is shallower than said deep diffusion; said additional diffusion abutting said deep diffusion and being laterally interposed between said deep diffusion and said isolated semiconductor portion;       wherein said bipolar device is fully isolated from other devices on the   
     
     
        chip. .Iaddend..Iadd.19.  The integrated circuit of claim 18, wherein said first conductivity type is N-type. .Iaddend..Iadd.20. The integrated circuit of claim 18, further comprising a thick oxide layer extending across the surface of said isolated portion, and having apertures therein; and further comprising ohmic contacts to said emitter and collector regions, each extending through a respective aperture in said oxide. .Iaddend..Iadd.21. The integrated circuit of claim 18, wherein said bipolar device is fully isolated from other devices on the chip by up/down diffused isolation regions which extend through the full thickness of an epitaxial layer which is of opposite conductivity type from the up/down diffused isolation regions and from the underlying substrate. .Iaddend..Iadd.22. The integrated circuit of claim 18, wherein said bipolar device is fully isolated from other devices on the chip by junction isolation. .Iaddend..Iadd.23. The integrated circuit of claim 18, wherein said collector region completely surrounds said emitter region. 
     
     
        .Iaddend..Iadd.24.  An integrated circuit, comprising: a monocrystalline semiconductor epitaxial layer of a first conductivity type overlying a second monocrystalline semiconductor region of a second conductivity type;   well regions of said second conductivity type, comprising both a down-diffusion into said epitaxial layer and also a corresponding up-diffusion into said epitaxial layer;   at least one field-effect transistor having source/drain diffusions corresponding to a shallow heavy concentration of dopants of said second conductivity type;   at least one said well region including therein a field-effect transistor having source/drain diffusions corresponding to a shallow heavy concentration of dopants of said first conductivity type;   at least one isolated portion of said epitaxial layer including therein a bipolar transistor comprising: an emitter region, comprising a high concentration of dopants of a second conductivity type, having a dopant distribution profile corresponding to said source/drain diffusions of said second conductivity type;   a base contact region making ohmic contact to said isolated portion;   a collector region located in proximity to said emitter region, and laterally separated therefrom by said isolated semiconductor portion, and comprising: a first diffusion corresponding to the dopant distribution profile of said source/drain diffusions of said second conductivity type;   a deep diffusion substantially corresponding to the dopant distribution profile of said down-diffusion, but not said up-diffusion, of said well regions; and       diffused isolation regions laterally surrounding said collector region, and extending through the full vertical thickness of said epitaxial layer.   
     
     
        .Iaddend..Iadd.25.  The integrated circuit of claim 24, wherein said first conductivity type is N-type. .Iaddend..Iadd.26. The integrated circuit of claim 24, further comprising a buried layer of said first conductivity type, beneath said first aperture, at the vertical boundary between said epitaxial layer and said second monocrystalline region. .Iaddend..Iadd.27. The integrated circuit of claim 24, further comprising a thick oxide layer extending across the surface of said isolated portion, and having apertures therein; and further comprising ohmic contacts to said emitter and collector regions, each extending through a respective aperture in said oxide. .Iaddend..Iadd.28. The integrated circuit of claim 24, wherein said isolation regions each include not only a down-diffusion, but also a respective up-diffusion. .Iaddend..Iadd.29. The integrated circuit of claim 24, wherein said collector region completely surrounds said emitter 
     
     
        region. .Iaddend..Iadd.30.  An integrated circuit device structure comprising: a monocrystalline semiconductor epitaxial layer of a first conductivity type overlying a second monocrystalline semiconductor region of a second conductivity type;   a thick oxide layer extending across the surface of said epitaxial layer, and having therein a first aperture, and a second aperture, separate from said first aperture, which surrounds said first aperture;   a first diffusion, comprising a shallow heavy diffusion of said second conductivity type, formed at and in self-alignment to said first and second apertures;   a second diffusion comprising a diffusion of said second conductivity type which is deeper than and has a lower concentration than said first diffusion, and which is formed under said second aperture but not said first aperture;   a third diffusion of said second conductivity type, which is formed in proximity to said second aperture but not said first aperture, and which is shallower than said second diffusion and partially coincides therewith; and   diffused isolation regions laterally surrounding said first diffusion, and extending through the full vertical thickness of said epitaxial layer.   
     
     
        .Iaddend..Iadd.31.  The integrated circuit of claim 30, wherein said first conductivity type is N-type. .Iaddend..Iadd.32. The integrated circuit of claim 30, further comprising a buried layer of said first conductivity type, beneath said first aperture, at the vertical boundary between said epitaxial layer and said second monocrystalline region. .Iaddend..Iadd.33. The integrated circuit of claim 30, wherein said isolation regions each include not only a down-diffusion, but also a respective up-diffusion. .Iaddend..Iadd.34. The integrated circuit of claim 30, wherein said collector region completely surrounds said emitter region. .Iaddend.