Wafer having chamfered bend portions in the joint regions between the contour of the cut-away portion of the wafer

Abstract

A wafer having chamfered bent portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer such as an orientation flatness. The chipping of the wafer can be prevented, and in coating the wafer with a photoresist, forming an epiaxially grown layer on the wafer, etc., films having desired characteristics can be provided on the surface of the wafer.

1. A wafer for forming an integrated circuit thereon, the wafer comprising:
 a main surface on which an integrated circuit is to be formed;    a substantially circular contour portion surrounding said main surface;    a curved notch formed in said circular contour portion; and    connecting portions defined between said circular contour portion and said curved notch, wherein said connecting potions are chamfered in a plane parallel to said main surface.    
     
     
       2. A wafer according to  claim 1 , wherein the chamfer of each of said connecting portions lies within the range defined by the points of an inscribed circle common to both the circular contour portion and the curved notch, and a radius of each inscribed circle is determined by the following expression: 
           W   -   B     2     ≦   r   ≦         b   2     -     a   2         2   ⁢     (     R   -         R   2     -     b   2           )               
       where
 r=radius of the inscribed circle,  
 R=radius of the wafer,  
 a=half of a length of an unchamfered portion in a positioning removal portion,  
 b=half of a full length of the positioning removal portion before the chamfering,  
 W=width of the wafer, and  
 B=length of wafer end face portion.  
 
     
     
       3. A wafer according to  claim 1 , wherein at least one of said connecting portions is rectilinearly chamfered in a plane parallel to said main surface. 
     
     
       4. A process for producing a semiconductor device, consisting essentially of:
   providing a wafer for forming an integrated circuit thereon, the wafer having a main surface on which an integrated circuit is to be formed, a substantially circular contour portion surrounding said main surface, a curved positioning notch formed in said circular contour portion and connecting portions defining between said circular contour portion and said curved positioning notch;        wherein an outer peripheral part of said wafer is chamfered in a thickness direction by mechanical chamfering, and        wherein said connecting portions are chamfered in a plane parallel to said main surface by mechanical chamfering.     
     
     
       5. A process for producing a semiconductor device, consisting essentially of:
   providing wafer for forming an integrated circuit thereon, the wafer having a main surface on which an integrated circuit is to be formed, a substantially circular contour portion surrounding said main surface, a curved positioning notch formed in said circular contour portion and connecting portions defined between said circular contour portion and said curved positioning notch;        wherein an outer peripheral part of said wafer is chamfered in a thickness direction by grindstone, and        wherein said connecting portions are chamfered in a plane parallel to said main surface by grindstone.     
     
     
       6. A process for producing a semiconductor device, consisting essentially of:
   providing a wafer for forming an integrated circuit thereon, the wafer having a main surface on which an integrated circuit is to be formed, a substantially circular contour portion surrounding said main surface, a curved positioning notch formed in said circular contour portion and connecting portions defined between said circular portion and said curved positioning notch, wherein said connecting portions are chamfered in a plane parallel to said main surface; and        positioning said wafer by rotating said wafer.     
     
     
       7. A process for producing a semiconductor device according to  claim 6 , wherein, in the positioning step, positioning said wafer by using photoelectric elements. 
     
     
       8. A process for producing a semiconductor device according to  claim 7 , wherein an outer peripheral part of said wafer is chamfered in a thickness direction by mechanical chamfering, and
   wherein said connecting portions are chamfered in a plane parallel to said main surface by mechanical chamfering.     
     
     
       9. A process for producing a semiconductor device according to  claim 7 , wherein an outer peripheral part of said wafer is chamfered in a thickness direction by grindstone, and
   wherein said connecting portions are chamfered in a plane parallel to said main surface by grindstone.     
     
     
       10. A process for producing a semiconductor device according to  claim 6 , wherein, in the positioning step, positioning said wafer by optical means. 
     
     
       11. A process for producing a semiconductor device according to  claim 6 , wherein an outer peripheral part of said wafer is chamfered in a thickness direction by mechanical chamfering, and
   wherein said connecting portions are chamfered in a plane parallel to said main surface by mechanical chamfering.     
     
     
       12. A process for producing a semiconductor device according to  claim 6 , wherein an outer peripheral part of said wafer is chamfered in a thickness direction by grindstone, and
   wherein said connecting portions are chamfered in a plane parallel to said main surface by grindstone.