Integrated circuit package, ball-grid array integrated circuit package

Abstract

The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump. One method of packaging an integrated circuit includes providing a semiconductor die including a plurality of bond pads; providing a package substrate including a plurality of conductive bumps including plural power bumps and plural signal bumps; arranging individual signal bumps to be immediately adjacent at least one power bump; and electrically coupling the bond pads of the semiconductor die with respective conductive bumps.

1. A ball-grid array integrated circuit package comprising:
 a semiconductor die having a plurality of bond pads;   a substrate including a first surface including a plurality of conductive pads, a second surface, and a plurality of conductors to electrically couple the conductive pads of the first surface with the second surface, the semiconductor die being coupled with the first surface and the bond pads being electrically coupled with the conductive pads and the conductors; and   a plurality of conductive balls coupled with the second surface and electrically coupled with respective ones of the conductors, conductive pads and bond pads, the conductive balls including a plurality of power balls and signal balls, wherein a majority of signal balls are individually positioned immediately adjacent at least one power ball.   
     
     
       2. The ball-grid array integrated circuit package according to  claim 1  A ball-grid array integrated circuit package comprising:
 a semiconductor die having a plurality of bond pads; 
 a substrate including a first surface including a plurality of conductive pads, a second surface, and a plurality of conductors to electrically couple the conductive pads of the first surface with the second surface, the semiconductor die being coupled with the first surface and the bond pads being electrically coupled with the conductive pads and the conductors; and 
 a plurality of conductive balls coupled with the second surface and electrically coupled with respective ones of the conductors, conductive pads and bond pads, the conductive balls including a plurality of power balls and signal balls, wherein a majority of signal balls are individually positioned immediately adjacent at least one power ball, and wherein all of the signal connections are individually positioned adjacent at least one power connection. 
 
     
     
       3. The ball-grid array integrated circuit package according to claim  1  2 wherein the sides of the array individually comprise at least a majority of signal balls. 
     
     
       4. The ball-grid array integrated circuit package according to claim  1  2 wherein the sides of the array individually comprise all signal balls intermediate a plurality of corner balls. 
     
     
       5. A ball-grid array integrated circuit package comprising:
 a semiconductor die having a plurality of bond pads;   a substrate including a first surface including a plurality of conductive pads, a second surface, and a plurality of conductors to electrically couple the conductive pads of the first surface with the second surface, the semiconductor die being coupled with the first surface and the bond pads being electrically coupled with the conductive pads and the conductors; and   a plurality of conductive balls coupled with the second surface and electrically coupled with respective ones of the conductors, conductive pads and bond pads, the conductive balls including a plurality of power balls and signal balls, wherein a majority of signal balls are individually positioned immediately adjacent at least one power ball, wherein the plurality of conductive balls are formed as an array;   at least one side of the array individually including at least a majority of signal balls; and   at least one row or column of the array individually including at least a majority of power balls.   
     
     
       6. The ball-grid array integrated circuit package according to claim 5 wherein the at least one row or column of the array is individually adjacent to the at least one side of the array. 
     
     
       7. The ball-grid array integrated circuit package according to claim 6 wherein each of the majority of signal balls in the at least one side of the array is immediately adjacent at least one power ball of the at least one row or column of the array. 
     
     
       8. The ball-grid array integrated circuit package according to claim 5 wherein the plurality of conductive balls comprises a center array substantially spaced apart from a periphery array. 
     
     
       9. The ball-grid array integrated circuit package according to claim 8 wherein the center array includes a majority of power balls. 
     
     
       10. The ball-grid array integrated circuit package according to claim 5 wherein the plurality of power balls are Vss or Vdd balls. 
     
     
       11. The ball-grid array integrated circuit package according to claim 5 wherein each of the majority of signal balls in the at least one side of the array is immediately adjacent at least one of the plurality of power balls. 
     
     
       12. The ball-grid array integrated circuit package according to claim 5 further comprising a plurality of corner balls diagonally arranged intermediate adjacent sides of the array. 
     
     
       13. The ball-grid array integrated circuit package according to claim 5 further comprising an external substrate having a second plurality of conductive pads, individual ones of the second plurality of conductive pads being electrically coupled to respective ones of the plurality of conductive balls. 
     
     
       14. The ball-grid array integrated circuit package according to claim 5 wherein the plurality of conductive balls are balls of a ball-grid array integrated circuit package. 
     
     
       15. The ball-grid array integrated circuit package according to claim 5 further comprising:
 plural vias within the substrate; and   via conductors within the vias.   
     
     
       16. A ball-grid array integrated circuit package comprising:
 a semiconductor die having a plurality of bond pads;   a substrate including a first surface including a plurality of conductive pads, a second surface, and a plurality of conductors to electrically couple the conductive pads of the first surface with the second surface, the semiconductor die being coupled with the first surface and the bond pads being electrically coupled with the conductive pads and the conductors;   a plurality of conductive balls coupled with the second surface and electrically coupled with respective ones of the conductors, conductive pads and bond pads, the conductive balls including a plurality of power balls and signal balls, wherein a majority of signal balls are individually positioned immediately adjacent at least one power ball, wherein the plurality of conductive balls are formed as an array;   a plurality of sides of the array individually including at least a majority of signal balls; and   a plurality of rows or columns of the array individually including at least a majority of power balls.   
     
     
       17. The ball-grid array integrated circuit package according to claim 16 wherein the plurality of rows or columns of the array are individually adjacent to at least one of the plurality of sides of the array. 
     
     
       18. The ball-grid array integrated circuit package according to claim 17 wherein each of the majority of signal balls in the plurality of sides of the array is immediately adjacent at least one of the majority of power balls in the plurality of rows or columns of the array. 
     
     
       19. The ball-grid array integrated circuit package according to claim 16 wherein the plurality of conductive balls comprises a center array substantially spaced apart from a periphery array. 
     
     
       20. The ball-grid array integrated circuit package according to claim 19 wherein the center array includes a majority of power balls. 
     
     
       21. The ball-grid array integrated circuit package according to claim 16 wherein the plurality of power balls are Vss or Vdd balls. 
     
     
       22. The ball-grid array integrated circuit package according to claim 16 wherein each of the majority of signal balls in the plurality of sides of the array is immediately adjacent at least one power ball. 
     
     
       23. The ball-grid array integrated circuit package according to claim 16 further comprising a plurality of corner balls diagonally arranged intermediate adjacent sides of the array. 
     
     
       24. The ball-grid array integrated circuit package according to claim 16 further comprising an external substrate having a second plurality of conductive pads, individual ones of the second plurality of conductive pads being electrically coupled to respective ones of the plurality of conductive balls. 
     
     
       25. The ball-grid array integrated circuit package according to claim 16 wherein the plurality of conductive balls are balls of a ball-grid array integrated circuit package. 
     
     
       26. The ball-grid array integrated circuit package according to claim 16 further comprising:
 plural vias located within the substrate; and   via conductors located within the vias.