USRE47170EActiveUtilityPatentIndex 98

Method of forming semiconductor patterns

Assignee: ASM GENITECH KOREA LTDPriority: Apr 14, 2010Filed: Jul 12, 2013Granted: Dec 18, 2018

Est. expiryApr 14, 2030(~3.8 yrs left)· nominal 20-yr term from priority

Inventors:BEYNET JULIEN PARK HYUNG-SANG INOUE NAOKI

H10P 14/6689H10P 14/6339H10P 14/6336H10P 76/4085H01L 21/0228H01L 21/02274H01L 21/02222H01L 21/0337H10P 76/2041

PatentIndex Score

441

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References

Claims

Abstract

Semiconductor patterns are formed by performing trimming simultaneously with the process of depositing the spacer oxide. Alternatively, a first part of the trimming is performed in-situ, immediately before the spacer oxide deposition process in the same chamber in which the spacer oxide deposition is performed whereas a second part of the trimming is performed simultaneously with the process of depositing the spacer oxide. Thus, semiconductor patterns are formed reducing PR footing during PR trimming with direct plasma exposure.

Claims

exact text as granted — not AI-modified

What is claimed is:

1. A method of forming semiconductor patterns, the method comprising:
forming a photo resist template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing, the ratio of the line width to the line spacing being 1:A wherein 1≤A&lt;3;
depositing a spacer oxide conformal over the photo resist template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and an oxygen plasma, such that trimming of the photo resist template occurs and the ratio of the line width to the line spacing becomes 1:3 and the thickness of the deposited spacer oxide is about equal to the trimmed line width, wherein the silicon precursor is SiH 2 [N(C 2 H 5 ) 2 ] 2 ;
etching back the deposited spacer oxide such that spacer oxide films on upper and bottom surfaces of the pattern are removed, with spacer oxide films on side wall surfaces of the photo resist template remaining;
removing the photo resist template remaining between the spacer oxide films by selective etching; and
patterning the bottom layer by using the remaining spacer oxide films formed as mask.

2. The method of claim 1 , further comprising:
trimming, prior to the step of depositing the spacer oxide, the photo resist pattern of lines such that the ratio of the line width to the line spacing becomes 1:B, wherein A&lt;B&lt;3 by exposing the photo resist pattern of lines to pulses of the oxygen plasma, in the same reaction chamber in which the spacer oxide deposition is performed.

3. The method of claim 2 , further comprising:
a PR footing reduction step prior to the step of depositing the spacer oxide, in the same reaction chamber in which PR trimming step and the spacer oxide deposition step are performed, the PR footing reduction step comprising a direct plasma exposure step.

4. The method of claim 2 , wherein the plasma is a direct plasma.

5. The method of claim 2 , wherein the plasma is a remote plasma.

6. The method of claim 3 , wherein the PR footing reduction step is performed prior to the PR trimming step.

7. The method of claim 3 , wherein the PR footing reduction step is performed after the PR trimming step.

8. The method of claim 3 , wherein the PR footing reduction step and the PR trimming step are performed simultaneously.

9. The method of claim 1 , wherein the plasma is a direct plasma.

10. The method of claim 1 , wherein the plasma is a remote plasma.

11. A method of forming semiconductor patterns, the method comprising:
forming a photo resist template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing, the ratio of the line width to the line spacing being 1:A wherein 1≤A&lt;3;
a photo resist footing reduction step comprising a direct plasma exposure step;
after performing the photo resist footing reduction step, trimming the photo resist pattern of lines such that the ratio of the line width to the line spacing becomes 1:B, wherein A&lt;B&lt;3, by exposing the photo resist pattern of lines to pulses of an oxygen plasma;
after trimming the photo resist pattern of lines, depositing a spacer oxide conformal over the photo resist template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and the oxygen plasma, such that trimming of the photo resist template occurs and the ratio of the line width to the line spacing becomes 1:3 and the thickness of the deposited spacer oxide is about equal to the trimmed line width;
etching back the deposited spacer oxide such that spacer oxide films on upper and bottom surfaces of the pattern are removed, with spacer oxide films on side wall surfaces of the photo resist template remaining;
removing the photo resist template remaining between the spacer oxide films by selective etching; and
patterning the bottom layer by using the remaining spacer oxide films formed as mask,
wherein trimming the photo resist, depositing the spacer oxide, and the photo resist footing reduction step are performed in a common reaction chamber.

12. The method of claim 11 , wherein the plasma is a direct plasma.

13. The method of claim 11 , wherein the plasma is a remote plasma.

14. The method of claim 11 , wherein the silicon precursor is SiH 2 [N(C 2 H 5 ) 2 ] 2 .

15. A method of forming patterns in a layer, the method comprising:
forming first template patterns on top of a bottom layer, the first template patterns having a width and a height; performing a footing reduction step; after performing the photo resist footing reduction step, trimming the template patterns of lines such that the ratio of the line width to the line spacing becomes 1:B, wherein A&lt;B&lt;3; depositing a spacer film using a plasma enhanced atomic layer deposition process that utilizes sequential and alternating pulses of a source gas and an oxygen plasma on the first template patterns to form second template patterns that have a width smaller than the width of the first template patterns and a height smaller than the height of the first template patterns, wherein the second template patterns have an upper surface, a bottom surface, and side wall surfaces; etching back the spacer film to remove the upper surface and bottom surface, such that spacer film the side wall surfaces remain; removing the second template patterns remaining between the spacer film such that the spacer film on the side wall surfaces remains; and patterning the bottom layer by using the remaining spacer film on the side wall surface as a hard mask, wherein, after the performing a footing reduction step, the first template patterns are etched by a reactant gas at a rate such that the first template patterns are trimmed to form reduced template patterns.

16. The method of claim 15 wherein the first template is formed of a photo resist material.

17. The method of claim 15 wherein the first template is formed of a carbon based material.

18. The method of claim 15 wherein the ratio of the line width to line spacing of the first template patterns is 1:A (1≤A&lt;3).

19. The method of claim 15 wherein the source gas comprises sequential and alternating pulses of a silicon precursor and O 2 plasma.

20. The method of claim 19 wherein the O 2 plasma is either a direct plasma, generated immediately adjacent to the substrate, or a remote plasma.

21. The method of claim 15 wherein the spacer film is SiO 2 .

22. The method of claim 15 wherein after the first template patterns is trimmed and the spacer film is formed, the spacing of the second template patterns is 1:3 and the thickness of the deposited spacer film is equal to the width of the second template patterns.

23. The method of claim 15 wherein the second template patterns are removed by selective etching.

24. The method of claim 15 wherein the bottom layer is a semiconductor.

25. The method of claim 15, further comprising a step of trimming the first template by thermal annealing.

26. The method of claim 15, further comprising a step of trimming the first template in situ in the same chamber in which the spacer deposition is performed.

27. The method of claim 26 wherein a substrate on which the first template patterns are formed is not removed from the chamber between the steps of trimming the first template patterns and depositing the spacer.

28. The method of claim 15 wherein the source gas comprises a metalorganic precursor containing Si or halosilane precursor containing Si.

29. The method of claim 15 wherein the source gas comprises SiH 2 [N(C 2 H 5 ) 2 ] 2 .

30. The method of claim 15 wherein a susceptor temperature for heating a substrate varies from room temperature to 200° C.

31. The method of claim 15 wherein a susceptor temperature is 50° C.

32. The method of claim 15 wherein during the depositing step, a pressure is maintained between 1 and 10 Torr.

33. The method of claim 15 wherein the spacer film is selected from the group consisting of an oxide, an oxynitride, and a nitride.

34. The method of claim 15 wherein O 2 is provided continuously during the depositing step and activated when plasma power is provided.

35. The method of claim 15 wherein O 2 is provided intermittently during the depositing step.

36. The method of claim 15 wherein a template trimming and the footing reduction step are performed simultaneously prior to the step of depositing a spacer.

37. The method of claim 36 wherein the first template patterns are exposed to a direct plasma during a trimming step in a template reduction step.

38. The method of claim 15 wherein, the reactant gas comprises oxygen.

39. The method of claim 38 wherein the reduced template patterns are etched simultaneously with depositing the spacer film.

40. The method of claim 15 wherein an oxygen radical is reacted with a precursor that was deposited previously on the layer to form the spacer film.

41. A method of forming patterns on a layer, the method comprising:
forming first template patterns on top of a bottom layer, the first template patterns having a width and a height; performing a footing reduction step to form second template patterns; after performing a footing reduction step, trimming the second template patterns so that the line width shrinks to form third template patterns having a line width less than the line width of the first template patterns; depositing a spacer film, using a plasma enhanced atomic layer deposition process that utilizes sequential and alternating pulses of a source gas and an oxygen plasma, on the third template patterns while simultaneously trimming the third template patterns to create fourth template patterns, the fourth template patterns having a width smaller than the width of the third template patterns, and a height smaller than the height of the first template patterns and smaller than the height of the third template patterns; etching back the spacer film such that it is removed from the upper and bottom surfaces of the fourth template patterns and remains on the side wall surfaces of the fourth template patterns; removing the fourth template patterns between the spacer film on the side wall surfaces, such that the spacer film on the side wall surfaces of the fourth template patterns remains; and patterning the bottom layer by using the spacer film as a hard mask, wherein the ratio of the line width to line spacing of the third template patterns is 1:B, wherein A&lt;B&lt;3.

42. The method of claim 41 wherein the first template is formed of a photo resist material.

43. The method of claim 41 wherein the first template is formed of a carbon based material.

44. The method of claim 41 wherein the ratio of the line width to line spacing of the first template patterns is 1:A (1≤A&lt;3).

45. The method of claim 41 wherein the second template patterns are trimmed using an O 2 plasma.

46. The method of claim 45 wherein the O 2 plasma is either a direct plasma or a remote plasma.

47. The method of claim 41 wherein the second template patterns are trimmed by thermal annealing.

48. The method of claim 41 wherein the second template patterns are trimmed in situ in the same chamber in which the spacer deposition is performed.

49. The method of claim 48 wherein a substrate on which the layer is formed is not removed from the chamber between the steps of trimming the second template patterns and depositing the spacer.

50. The method of claim 41 wherein the source gas comprises sequential and alternating pulses of a silicon precursor and O 2 plasma.

51. The method of claim 41 wherein the spacer film is SiO 2 .

52. The method of claim 41 wherein after the second template patterns are trimmed and the spacer film is formed, the spacing of the fourth template patterns is 1:3 and the thickness of the deposited spacer film is equal to the width of the fourth template patterns.

53. The method of claim 41 wherein multiple layers of the spacer film are deposited.

54. The method of claim 41 wherein the source gas comprises a metal organic precursor containing Si or halosilane precursor containing Si.

55. The method of claim 54 wherein the source gas comprises SiH 2 [N(C 2 H 5 ) 2 ] 2 .

56. The method of claim 41 wherein a susceptor temperature for heating a substrate varies from room temperature to 200° C.

57. The method of claim 41 wherein a susceptor temperature is 50° C.

58. The method of claim 41 wherein during the depositing step, a pressure is maintained between 1 and 10 Torr.

59. The method of claim 41 wherein O 2 is provided continuously during the depositing step and activated when plasma power is provided.

60. The method of claim 41 wherein O 2 is provided intermittently during the depositing step.

61. The method of claim 41 wherein performing a footing reduction step and trimming the second template patterns step are performed prior to the deposition of the spacer.

62. The method of claim 41 wherein the third template patterns are exposed to a direct plasma during the trimming step in a template reduction step.

63. The method of claim 41 wherein the third template patterns are etched with O 2 plasma such that they are trimmed to form the fourth template patterns.

64. A method of forming patterns on a layer, the method comprising:
forming a template having a pattern of lines on a bottom layer, the pattern having a line width and a line spacing; depositing a spacer conformal over the template by a Plasma Enhanced Atomic Layer deposition process, using sequential and alternating pulses of a silicon precursor and an oxygen plasma, such that trimming of the template occurs wherein the silicon precursor is SiH2[N(C2H5)2]2; etching back the deposited spacer such that spacer films on upper and bottom surfaces of the pattern are removed, with spacer films on side wall surfaces of the template remaining; and removing the template between the spacer films by selective etching, wherein during the forming step, the ratio of the line width to the line spacing is 1:A wherein 1≤A&lt;3.

65. The method of claim 64 wherein during the depositing step the ratio of the template line width to the template line spacing becomes 1:3.

66. The method of claim 64 wherein during the depositing step the thickness of the deposited spacer is about equal to the trimmed line width.

67. The method of claim 64 wherein the layer is a semiconductor.

68. The method of claim 64 further comprising the step of patterning the bottom layer by using the remaining spacer films formed as mask.

69. The method of claim 64 wherein the template is formed of a photo resist material.

70. The method of claim 64 wherein the template is formed of a carbon based material.

71. The method of claim 64 further comprising the step of trimming the template prior to the step of depositing.

72. The method of claim 64 further comprising the step of performing a footing reduction step.

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