P

Inventor

MELTZER DAVID

US45 patents
⚠️ This page may combine multiple inventors who share the name “MELTZER DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

22 patents
US5875470AFeb 23, 1999

Multi-port multiple-simultaneous-access DRAM chip

IBM140 citations97
US6665790B1Dec 16, 2003

Vector register file with arbitrary vector addressing

IBM69 citations95
US4823259AApr 18, 1989

High speed buffer store arrangement for quick wide transfer of data

IBM66 citations94
US6138208AOct 24, 2000

Multiple level cache memory with overlapped L1 and L2 memory access

IBM52 citations93
US5987587ANov 16, 1999

Single chip multiprocessor with shared execution units

IBM41 citations93
US5544173AAug 6, 1996

Delay test coverage without additional dummy latches in a scan-based test design

IBM30 citations93
US7467288B2Dec 16, 2008

Vector register file with arbitrary vector addressing

IBM25 citations92
US6604191B1Aug 5, 2003

Method and apparatus for accelerating instruction fetching for a processor

IBM21 citations92
US6580293B1Jun 17, 2003

Body-contacted and double gate-contacted differential logic circuit and method of operation

IBM27 citations92
US6269039B1Jul 31, 2001

System and method for refreshing memory devices

IBM23 citations92
US5365204ANov 15, 1994

CMOS voltage controlled ring oscillator

IBM22 citations91
US7356673B2Apr 8, 2008

System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form

IBM14 citations83
US6065110AMay 16, 2000

Method and apparatus for loading an instruction buffer of a processor capable of out-of-order instruction issue

IBM9 citations74
US5953283ASep 14, 1999

Multi-port SRAM with reduced access requirements

IBM13 citations74
US5502731AMar 26, 1996

Delay test coverage without additional dummy latches in a scan-based test design

IBM13 citations74
US4852095AJul 25, 1989

Error detection circuit

IBM11 citations74
US4466099AAug 14, 1984

Information system using error syndrome for special control

IBM17 citations74
US4453209AJun 5, 1984

System for optimizing performance of paging store

IBM7 citations74
US4368513AJan 11, 1983

Partial roll mode transfer for cyclic bulk memory

IBM14 citations74
US7308559B2Dec 11, 2007

Digital signal processor with cascaded SIMD organization

IBM9 citations73
US6038659AMar 14, 2000

Method for using read-only memory to generate controls for microprocessor

IBM2 citations63
US6990509B2Jan 24, 2006

Ultra low power adder with sum synchronization

IBM2 citations61

SEIKO EPSON CORP

22 patents
US7885359B2Feb 8, 2011

Sampling demodulator for amplitude shift keying (ASK) radio receiver

SEIKO EPSON CORP38 citations93
US7355482B2Apr 8, 2008

Methods and apparatus for compensating a variable oscillator for process, voltage, and temperature variations using a replica oscillator

SEIKO EPSON CORP41 citations93
US7167058B2Jan 23, 2007

Temperature compensation for a variable frequency oscillator without reducing pull range

SEIKO EPSON CORP20 citations93
US7268645B2Sep 11, 2007

Integrated resonator structure and methods for its manufacture and use

SEIKO EPSON CORP20 citations92
US7349514B2Mar 25, 2008

Frequency/phase locked loop clock synthesizer using an all digital frequency detector and an analog phase detector

SEIKO EPSON CORP23 citations91
US7224180B2May 29, 2007

Methods and systems for rise-time improvements in differential signal outputs

SEIKO EPSON CORP14 citations84
US7212050B2May 1, 2007

System and method for synthesizing a clock at digital wrapper (FEC) and base frequencies using one precision resonator

SEIKO EPSON CORP15 citations84
US7161440B2Jan 9, 2007

Temperature compensation circuit

SEIKO EPSON CORP16 citations84
US7082178B2Jul 25, 2006

Lock detector circuit for dejitter phase lock loop (PLL)

SEIKO EPSON CORP17 citations84
US7719928B2May 18, 2010

Radio watch

SEIKO EPSON CORP11 citations82
US7268635B2Sep 11, 2007

Circuits for voltage-controlled ring oscillators and method of generating a periodic signal

SEIKO EPSON CORP8 citations74
US7265635B2Sep 4, 2007

Method and apparatus for assisting pull-in of a phase-locked loop

SEIKO EPSON CORP8 citations74
US7157942B2Jan 2, 2007

Digital frequency difference detector with inherent low pass filtering and lock detection

SEIKO EPSON CORP7 citations74
US7352248B2Apr 1, 2008

Method and apparatus for maintaining a clock/data recovery circuit frequency during transmitter low power mode

SEIKO EPSON CORP7 citations73
US7187222B2Mar 6, 2007

CMOS master/slave flip-flop with integrated multiplexor

SEIKO EPSON CORP9 citations73
US7038497B2May 2, 2006

Differential current mode phase/frequency detector circuit

SEIKO EPSON CORP7 citations71
US7034594B2Apr 25, 2006

Differential master/slave CML latch

SEIKO EPSON CORP9 citations71
US7558342B2Jul 7, 2009

Circuits and methods for acquiring a frequency of a data bitstream

SEIKO EPSON CORP4 citations63
US7804911B2Sep 28, 2010

Dual demodulation mode AM radio

SEIKO EPSON CORP2 citations62
US7792514B2Sep 7, 2010

Envelope detector for AM radio

SEIKO EPSON CORP2 citations61
US8000671B2Aug 16, 2011

Dual threshold demodulation in an amplitude modulation radio receiver

SEIKO EPSON CORP0 citations51
US7042251B2May 9, 2006

Multi-function differential logic gate

SEIKO EPSON CORP0 citations39

MICROSOFT CORP

1 patent