Inventor · disambiguated record
Gunter Grasshoff
Also filed as: GRASSHOFF GUNTER
20 granted patents·6 pending applications·124 citations·filing 2002–2019
93Inventor score
Files withADVANCED MICRO DEVICES INC8GLOBALFOUNDRIES INC8BEYER SVEN2GRASSHOFF GUNTER2GLOBALFOUNDRIES US INC1
Top patents by PatentIndex Score
26 records- 0192US7723174B2CMOS device comprising MOS transistors with recessed drain and source areas and a SI/GE material in the drain and source areas of the PMOS transistorGLOBALFOUNDRIES INC·Filed 2009·Granted May 25, 2010·25 cites·14 claims
- 0291US8021942B2Method of forming CMOS device having gate insulation layers of different type and thicknessGLOBALFOUNDRIES INC·Filed 2008·Granted Sep 20, 2011·23 cites·22 claims
- 0388US7381622B2Method for forming embedded strained drain/source regions based on a combined spacer and cavity etch processADVANCED MICRO DEVICES INC·Filed 2006·Granted Jun 3, 2008·14 cites·19 claims
- 0485US10103067B1Semiconductor device comprising trench isolationGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 16, 2018·5 cites·20 claims
- 0575US11031406B2Semiconductor devices having silicon/germanium active regions with different germanium concentrationsGLOBALFOUNDRIES US INC·Filed 2019·Granted Jun 8, 2021·1 cites·20 claims
- 0671US8198166B2Using high-k dielectrics as highly selective etch stop materials in semiconductor devicesKAMMLER THORSTEN·Filed 2010·Granted Jun 12, 2012·3 cites·17 claims
- 0769US10224251B2Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode linesGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 5, 2019·1 cites·20 claims
- 0869US8932930B2Enhancing integrity of a high-K gate stack by protecting a liner at the gate bottom during gate head exposureADVANCED MICRO DEVICES INC·Filed 2012·Granted Jan 13, 2015·2 cites·4 claims
- 0966US6969676B2Method of adjusting etch selectivity by adapting aspect ratios in a multi-level etch processADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 29, 2005·11 cites·28 claims
- 1066US6724096B2Die corner alignment structureADVANCED MICRO DEVICES INC·Filed 2002·Granted Apr 20, 2004·14 cites·18 claims
- 1164US8329549B2Enhancing integrity of a high-k gate stack by protecting a liner at the gate bottom during gate head exposureBEYER SVEN·Filed 2009·Granted Dec 11, 2012·2 cites·17 claims
- 1263US6879871B2Advanced process control for a manufacturing process of a plurality of products with minimized control degradation after re-initialization upon occurrence of reset eventsADVANCED MICRO DEVICES INC·Filed 2002·Granted Apr 12, 2005·6 cites·40 claims
- 1362US6875676B2Methods for producing a highly doped electrode for a field effect transistorADVANCED MICRO DEVICES INC·Filed 2003·Granted Apr 5, 2005·8 cites·24 claims
- 1461US7005305B2Signal layer for generating characteristic optical plasma emissionsADVANCED MICRO DEVICES INC·Filed 2003·Granted Feb 28, 2006·7 cites·25 claims
- 1554US10522555B2Semiconductor devices including Si/Ge active regions with different Ge concentrationsGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 31, 2019·0 cites·18 claims
- 1649US10199479B2Methods of forming a gate cap layer above a replacement gate structureGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 5, 2019·0 cites·13 claims
- 1748US6838010B2System and method for wafer-based controlled patterning of features with critical dimensionsADVANCED MICRO DEVICES INC·Filed 2002·Granted Jan 4, 2005·2 cites·41 claims
- 1845US2010025742A1Transistor having a strained channel region caused by hydrogen-induced lattice deformationBEYER SVEN·Filed 2009·Application pending·0 cites
- 1944US9412600B2Method of forming a semiconductor structure including a ferroelectric material and semiconductor structure including a ferroelectric transistorGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 9, 2016·0 cites·45 claims
- 2041US2013181265A1Methods of Forming a Gate Cap Layer Above a Replacement Gate Structure and a Semiconductor Device That Includes Such a Gate Structure and Cap LayerGRASSHOFF GUNTER·Filed 2012·Application pending·0 cites
- 2139US2004118516A1Plasma parameter control using learning dataFiled 2003·Application pending·0 cites
- 2238US8791017B2Methods of forming conductive structures using a spacer erosion techniqueGRASSHOFF GUNTER·Filed 2011·Granted Jul 29, 2014·0 cites·15 claims
- 2338US2004084619A1Method and an apparatus for determining the dimension of a feature by varying a resolution determining parameterFiled 2003·Application pending·0 cites
- 2437US2004241917A1Method of forming a substrate contact for an SOI semiconductor deviceFiled 2003·Application pending·0 cites
- 2535US2017338343A1High-voltage transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 2625US8133814B1Etch methods for semiconductor device fabricationLAUFER STEFFEN·Filed 2010·Granted Mar 13, 2012·0 cites·12 claims
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