Inventor

Lin zhi-chang

TW138 patents

⚠️ This page may combine multiple inventors who share the name “Lin zhi-chang”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Lin zhi-chang

TAIWAN SEMICONDUCTOR MFG CO LTD

Methods of cutting metal gates and structures formed thereof

Gate isolation for multigate device

Method for forming long channel back-side power rail device

Methods of cutting metal gates and structures formed thereof

Uniform gate width for nanostructure devices

Methods of cutting metal gates and structures formed thereof

Integrated circuits with gate cut features

Methods of cutting metal gates and structures formed thereof

Semiconductor device structure and method for forming the same

Method and device for forming cut-metal-gate feature

Semiconductor device and manufacturing method thereof

Tuning tensile strain on FinFET

Method of forming butted contact

Semiconductor device structure and methods of forming the same

Gate isolation for multigate device

Uniform gate width for nanostructure devices

Semiconductor structure and method for forming the same

Semiconductor structure with staggered selective growth

Semiconductor device structure and methods of forming the same

Gate all around transistor with dual inner spacers

Integrated circuits with gate cut features

Multi-gate device and related methods

Semiconductor device structure and method for forming the same

Semiconductor devices and methods of manufacture

Semiconductor device structure and methods of forming the same

Enlargement of GAA nanostructure

Semiconductor device with facet S/D feature and methods of forming the same

Integrated circuits with FinFET gate structures

Method of forming a semiconductor structure including laterally etching semiconductor material in fin recess region and depositing metal gate therein

Multi-gate device and related methods

Semiconductor device and manufacturing method thereof

Semiconductor device and method

Spacer structure for semiconductor device

Latch-up prevention

Forming dielectric dummy fins with different heights in different regions of a semiconductor device

Method for metal gate cut and structure thereof

Tuning tensile strain on FinFET

Semiconductor device

Method and device for forming metal gate electrodes for transistors

Semiconductor structure with staggered selective growth

Tuning tensile strain on FinFET

Semiconductor device and method for manufacturing the same

FinFet device with channel epitaxial region

Integrated circuit with bottom dielectric insulators and fin sidewall spacers for reducing source/drain leakage currents

Integrated circuit with nanostructure transistors and bottom dielectric insulators

Semiconductor device and method fabricating the same

Reduction of gate-drain capacitance

Semiconductor structure and method for forming the same

Multi-gate device and related methods

TAIWAN SEMICONDUCTOR MFG

Tuning tensile strain on FinFET