Inventor

KONISHI YASUHIRO

JP93 patents

⚠️ This page may combine multiple inventors who share the name “KONISHI YASUHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KONISHI YASUHIRO

MITSUBISHI ELECTRIC CORP

Synchronous semiconductor memory device and synchronous memory module

Synchronous semiconductor memory device

Synchronous type semiconductor memory device operating in synchronization with an external clock signal

Synchronous semiconductor memory device

Clock synchronous semiconductor memory device allowing testing by low speed tester

Synchronous semiconductor memory device

Synchronous semiconductor memory device

Synchronous semiconductor memory device in which current consumed by input buffer circuit is reduced

Semiconductor memory device and data transfer circuit for transferring data between a DRAM and a SRAM

Synchronous semiconductor memory device

Multi-bank synchronous semiconductor memory device

Synchronous semiconductor memory device which allows switching of bit configuration

Voltage control type delay circuit and internal clock generation circuit using the same

Semiconductor memory device

Synchronous semiconductor memory device having a mode requiring an internal clock signal and a mode not requiring the internal clock signal

Semiconductor memory device including a data transfer circuit for transferring data between a DRAM and an SRAM

Test circuit in clock synchronous semiconductor memory device

Semiconductor memory device

Semiconductor memory device

Synchronous type semiconductor memory device operating in synchronization with an external clock signal

Test circuit in clock synchronous semiconductor memory device

Test circuit for refresh counter of clock synchronous type semiconductor memory device

Substrate bias generator in a dynamic random access memory with auto/self refresh functions and a method of generating a substrate bias therein

Substrate bias potential generator of a semiconductor integrated circuit device and a generating method therefor

Random access memory having separate read out and write in bus lines for reduced access time and operating method therefor

Self-refreshing of dynamic random access memory device and operating method therefor

Dynamic random access memory device and operating method therefor

Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block

Semiconductor memory device

Synchronous semiconductor memory including register for storing data input and output mode information

Semiconductor memory device with an internal voltage generating circuit

Synchronous semiconductor memory device reliably fetching external signal in synchronization with clock signal periodically supplied from the exterior

Synchronous semiconductor memory device realizing high speed and accurate operation

Power-on reset signal generator and operating method thereof

Semiconductor memory device divided into blocks and operable to read and write data through different data lines and operation method of the same

Dynamic random access memory device capable of performing test mode operation and method of operating such memory device

Dynamic-type semiconductor memory device operable in test mode and method of testing functions thereof

Circuit having charge compensation and an operation method of the same

Voltage boosting circuit and operating method thereof

Dynamic semiconductor memory device and method for controllig the precharge/refresh and access modes thereof

Semiconductor memory device with an improved multi-bit test mode

Circuit for generating a boosted signal for a word line

Semiconductor memory device

Synchronous semiconductor memory device

Synchronous semiconductor memory having read data mask controlled output circuit

Semiconductor memory device

Semiconductor memory device

Semiconductor memory device

HONDA MOTOR CO LTD

Operating device

OHSHIMA KENICHI

Vehicle surroundings monitoring apparatus