Inventor

SHIN HANGIL

KR56 patents

⚠️ This page may combine multiple inventors who share the name “SHIN HANGIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIN HANGIL

STATS CHIPPAC LTD

Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package

Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereof

Integrated circuit packaging system with stacked integrated circuit and heat spreader with openings and method of manufacture thereof

Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die

Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe

Integrated circuit packaging system with a tiered substrate package and method of manufacture thereof

Mountable integrated circuit package system with stacking interposer

Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die

Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package

Methods of forming conductive and insulating layers

Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP

Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe

Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structure

Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die

Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposer

Methods of forming conductive jumper traces

Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die

Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structure

CHI HEEJO

Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die

Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP

Method of forming thin profile WLCSP with vertical interconnect over package footprint

Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP

Integrated circuit system with recessed through silicon via pads and method of manufacture thereof

Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint

Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint

Integrated circuit packaging system with package-on-package and method of manufacture thereof

Integrated circuit packaging system with encapsulation and method of manufacture thereof

Integrated circuit packaging system with foldable substrate and method of manufacture thereof

Integrated circuit packaging system with single metal layer interposer and method of manufacture thereof

Integrated circuit packaging system with stiffener and method of manufacture thereof

CHO NAMJU

Integrated circuit packaging system with encapsulated via and method of manufacture thereof

Carrier system with multi-tier conductive posts and method of manufacture thereof

Integrated circuit packaging system with stacking interconnect and method of manufacture thereof

Method of manufacture of integrated circuit packaging system with multi-tier conductive interconnects

Integrated circuit packaging system with intra substrate die and method of manufacture thereof

Integrated circuit package stacking system with shielding and method of manufacture thereof

Integrated circuit packaging system with embedded thermal heat shield and method of manufacture thereof

Integrated circuit package system with package stacking and method of manufacture thereof

Integrated circuit packaging system with package stacking and method of manufacture thereof

SHIN HANGIL

Semiconductor device and method of forming pre-molded semiconductor die having bumps embedded in encapsulant

Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereof

Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die

Integrated circuit packaging system with package-on-package and method of manufacture thereof

STATS CHIPPAC PTE LTD

Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package

Integrated circuit packaging system with joint assembly and method of manufacture thereof

Methods of forming conductive and insulating layers

YOON IN SANG

Integrated circuit packaging system with an interposer substrate and method of manufacture thereof

Integrated circuit package system with step mold recess

CHOI DAESIK

Semiconductor device and method of forming leadframe with conductive bodies for vertical electrical interconnect of semiconductor die

KIM KYUNG MOON

Methods of forming solder balls in semiconductor packages