US10510703B2ActiveUtilityA1

Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package

95
Assignee: STATS CHIPPAC PTE LTDPriority: Mar 20, 2014Filed: May 12, 2017Granted: Dec 17, 2019
Est. expiryMar 20, 2034(~7.7 yrs left)· nominal 20-yr term from priority
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95
PatentIndex Score
8
Cited by
24
References
25
Claims

Abstract

A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating film is disposed between the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The bumps include a copper core encapsulated within copper plating. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The substrate includes a conductive layer formed in the substrate and coupled to the bumps. The semiconductor die is disposed between the bumps of the substrate. The bumps and the semiconductor die are embedded within the first prefabricated insulating film. A portion of the first prefabricated insulating film is removed to expose the bumps. The bumps electrically connect the substrate to the interconnect structure.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
       1. A method of making a semiconductor device, comprising:
 providing a semiconductor die; 
 disposing the semiconductor die over a carrier; 
 disposing a substrate over the carrier; 
 laminating a prefabricated insulating film onto the substrate; and 
 mounting the substrate to the carrier with the semiconductor die embedded in the prefabricated insulating film after laminating the insulating film onto the substrate. 
 
     
     
       2. The method of  claim 1 , further including disposing a plurality of bumps on the substrate prior to laminating the insulating film onto the substrate. 
     
     
       3. The method of  claim 1 , further including removing the carrier after mounting the substrate to the carrier. 
     
     
       4. The method of  claim 3 , further including forming a build-up interconnect structure over the prefabricated insulating film opposite the substrate after removing the carrier. 
     
     
       5. A method of making a semiconductor device, comprising:
 providing a semiconductor die; 
 providing a substrate; 
 laminating a prefabricated insulating film over the substrate; 
 disposing the substrate and prefabricated insulating film over the semiconductor die; and 
 applying pressure to the substrate to embed the semiconductor die in the prefabricated insulating film after laminating the prefabricated insulating film over the substrate. 
 
     
     
       6. The method of  claim 5 , wherein the substrate includes a conductive layer that remains exposed after the applying pressure step. 
     
     
       7. The method of  claim 5 , further including:
 disposing the semiconductor die on a carrier; and 
 removing the carrier after the applying pressure step. 
 
     
     
       8. The method of  claim 7 , further including forming an interconnect structure over the prefabricated insulating film opposite the substrate after removing the carrier. 
     
     
       9. The method of  claim 5 , further including:
 providing an interconnect structure on the substrate; and 
 laminating the prefabricated insulating film over the substrate with the interconnect structure embedded in the prefabricated insulating film. 
 
     
     
       10. The method of  claim 9 , wherein the interconnect structure extends completely through the prefabricated insulating film. 
     
     
       11. A method of making a semiconductor device, comprising:
 providing a semiconductor die; 
 providing a substrate; and 
 disposing the substrate over the semiconductor die with the semiconductor die embedded in a prefabricated insulating film. 
 
     
     
       12. The method of  claim 11 , further including forming a build-up interconnect structure over the prefabricated insulating film and an active surface of the semiconductor die. 
     
     
       13. The method of  claim 12 , further including providing a conductive bump that extends from the substrate to the build-up interconnect structure through the prefabricated insulating film. 
     
     
       14. The method of  claim 13 , wherein the conductive bump includes copper. 
     
     
       15. The method of  claim 11 , wherein the substrate includes a conductive layer exposed opposite the prefabricated insulating film. 
     
     
       16. A semiconductor device, comprising:
 a semiconductor die; 
 a substrate; and 
 a prefabricated insulating film disposed between the substrate and a non-active surface of the semiconductor die, wherein the semiconductor die is embedded in the prefabricated insulating film. 
 
     
     
       17. The semiconductor device of  claim 16 , further including a build-up interconnect structure formed over the prefabricated insulating film and an active surface of the semiconductor die. 
     
     
       18. The semiconductor device of  claim 17 , further including a conductive bump formed over the build-up interconnect structure opposite the prefabricated insulating film. 
     
     
       19. The semiconductor device of  claim 17 , further including a conductive bump extending from the substrate to the build-up interconnect structure through the prefabricated insulating film. 
     
     
       20. The semiconductor device of  claim 19 , wherein the conductive bump includes copper. 
     
     
       21. The semiconductor device of  claim 16 , wherein the substrate includes a conductive layer exposed opposite the prefabricated insulating film. 
     
     
       22. The method of  claim 2 , wherein each of the bumps includes a copper core and a solder coating disposed around the copper core. 
     
     
       23. The method of  claim 22 , further including removing a portion of the solder coating to expose the copper core after mounting the substrate to the carrier. 
     
     
       24. The method of  claim 5 , wherein the interconnect structure includes a copper core and a solder coating disposed around the copper core. 
     
     
       25. The method of  claim 24 , further including removing a portion of the solder coating to expose the copper core.

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References (0)

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