Inventor · disambiguated record
Hangil Shin
Also filed as: SHIN HANGIL
56 granted patents·8 pending applications·1,061 citations·filing 2007–2023
99Inventor score
Top patents by PatentIndex Score
64 records- 0199US7928552B1Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2010·Granted Apr 19, 2011·110 cites·10 claims
- 0298US9362161B2Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor packageSTATS CHIPPAC LTD·Filed 2014·Granted Jun 7, 2016·47 cites·23 claims
- 0398US8288209B1Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor dieCHI HEEJO·Filed 2011·Granted Oct 16, 2012·52 cites·20 claims
- 0498US8264091B2Integrated circuit packaging system with encapsulated via and method of manufacture thereofCHO NAMJU·Filed 2009·Granted Sep 11, 2012·95 cites·20 claims
- 0598US8143097B2Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMPCHI HEEJO·Filed 2009·Granted Mar 27, 2012·80 cites·20 claims
- 0698US8138014B2Method of forming thin profile WLCSP with vertical interconnect over package footprintCHI HEEJO·Filed 2010·Granted Mar 20, 2012·42 cites·20 claims
- 0797US9496152B2Carrier system with multi-tier conductive posts and method of manufacture thereofCHO NAMJU·Filed 2010·Granted Nov 15, 2016·42 cites·20 claims
- 0897US9048306B2Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMPCHI HEEJO·Filed 2012·Granted Jun 2, 2015·27 cites·8 claims
- 0997US8318539B2Method of manufacture of integrated circuit packaging system with multi-tier conductive interconnectsCHO NAMJU·Filed 2011·Granted Nov 27, 2012·37 cites·10 claims
- 1096US9397050B2Semiconductor device and method of forming pre-molded semiconductor die having bumps embedded in encapsulantSHIN HANGIL·Filed 2009·Granted Jul 19, 2016·53 cites·17 claims
- 1196US8390108B2Integrated circuit packaging system with stacking interconnect and method of manufacture thereofCHO NAMJU·Filed 2009·Granted Mar 5, 2013·47 cites·19 claims
- 1296US8039316B2Integrated circuit packaging system with stacked integrated circuit and heat spreader with openings and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2009·Granted Oct 18, 2011·46 cites·20 claims
- 1395US10510703B2Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor packageSTATS CHIPPAC PTE LTD·Filed 2017·Granted Dec 17, 2019·8 cites·25 claims
- 1495US8384227B2Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor dieSTATS CHIPPAC LTD·Filed 2010·Granted Feb 26, 2013·17 cites·25 claims
- 1595US8349658B2Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframeSTATS CHIPPAC LTD·Filed 2010·Granted Jan 8, 2013·19 cites·25 claims
- 1695US8202797B2Integrated circuit system with recessed through silicon via pads and method of manufacture thereofCHI HEEJO·Filed 2010·Granted Jun 19, 2012·20 cites·20 claims
- 1795US7863735B1Integrated circuit packaging system with a tiered substrate package and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2009·Granted Jan 4, 2011·38 cites·20 claims
- 1894US8716065B2Integrated circuit packaging system with encapsulation and method of manufacture thereofCHI HEEJO·Filed 2011·Granted May 6, 2014·17 cites·20 claims
- 1994US8409917B2Integrated circuit packaging system with an interposer substrate and method of manufacture thereofYOON IN SANG·Filed 2011·Granted Apr 2, 2013·19 cites·20 claims
- 2094US8106498B2Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereofSHIN HANGIL·Filed 2009·Granted Jan 31, 2012·38 cites·20 claims
- 2192US9269595B2Semiconductor device with thin profile WLCSP with vertical interconnect over package footprintCHI HEEJO·Filed 2012·Granted Feb 23, 2016·11 cites·24 claims
- 2292US7800212B2Mountable integrated circuit package system with stacking interposerSTATS CHIPPAC LTD·Filed 2007·Granted Sep 21, 2010·24 cites·18 claims
- 2391US9691707B2Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor packageSTATS CHIPPAC LTD·Filed 2016·Granted Jun 27, 2017·5 cites·24 claims
- 2491US8421203B2Integrated circuit packaging system with foldable substrate and method of manufacture thereofCHI HEEJO·Filed 2010·Granted Apr 16, 2013·13 cites·11 claims
- 2589US9748157B1Integrated circuit packaging system with joint assembly and method of manufacture thereofSTATS CHIPPAC PTE LTD·Filed 2013·Granted Aug 29, 2017·10 cites·20 claims
- 2689US9064859B2Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframeSTATS CHIPPAC LTD·Filed 2012·Granted Jun 23, 2015·8 cites·26 claims
- 2788US8018034B2Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structureSTATS CHIPPAC LTD·Filed 2009·Granted Sep 13, 2011·13 cites·21 claims
- 2887US9263332B2Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMPSTATS CHIPPAC LTD·Filed 2013·Granted Feb 16, 2016·6 cites·28 claims
- 2987US8318541B2Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor dieSHIN HANGIL·Filed 2010·Granted Nov 27, 2012·8 cites·19 claims
- 3086US9966335B2Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor dieSTATS CHIPPAC LTD·Filed 2015·Granted May 8, 2018·4 cites·9 claims
- 3186US8476111B2Integrated circuit packaging system with intra substrate die and method of manufacture thereofCHO NAMJU·Filed 2011·Granted Jul 2, 2013·8 cites·10 claims
- 3284US9558965B2Semiconductor device with thin profile WLCSP with vertical interconnect over package footprintCHI HEEJO·Filed 2012·Granted Jan 31, 2017·5 cites·19 claims
- 3384US9406533B2Methods of forming conductive and insulating layersSTATS CHIPPAC LTD·Filed 2013·Granted Aug 2, 2016·6 cites·25 claims
- 3484US9312218B2Semiconductor device and method of forming leadframe with conductive bodies for vertical electrical interconnect of semiconductor dieCHOI DAESIK·Filed 2011·Granted Apr 12, 2016·8 cites·20 claims
- 3583US9299650B1Integrated circuit packaging system with single metal layer interposer and method of manufacture thereofCHI HEEJO·Filed 2013·Granted Mar 29, 2016·6 cites·20 claims
- 3681US8749040B2Integrated circuit packaging system with package-on-package and method of manufacture thereofCHI HEEJO·Filed 2009·Granted Jun 10, 2014·9 cites·9 claims
- 3781US8541872B2Integrated circuit package system with package stacking and method of manufacture thereofCHO NAMJU·Filed 2010·Granted Sep 24, 2013·6 cites·20 claims
- 3880US9842808B2Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor dieSTATS CHIPPAC LTD·Filed 2012·Granted Dec 12, 2017·4 cites·25 claims
- 3980US8564125B2Integrated circuit packaging system with embedded thermal heat shield and method of manufacture thereofCHO NAMJU·Filed 2011·Granted Oct 22, 2013·5 cites·18 claims
- 4080US8492888B2Integrated circuit packaging system with stiffener and method of manufacture thereofCHI HEEJO·Filed 2011·Granted Jul 23, 2013·5 cites·20 claims
- 4179US8350368B2Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structureSTATS CHIPPAC LTD·Filed 2011·Granted Jan 8, 2013·4 cites·27 claims
- 4278US8951834B1Methods of forming solder balls in semiconductor packagesKIM KYUNG MOON·Filed 2013·Granted Feb 10, 2015·6 cites·19 claims
- 4378US8932907B2Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor dieSTATS CHIPPAC LTD·Filed 2012·Granted Jan 13, 2015·3 cites·21 claims
- 4477US8389329B2Integrated circuit packaging system with package stacking and method of manufacture thereofCHO NAMJU·Filed 2011·Granted Mar 5, 2013·4 cites·20 claims
- 4576US9865575B2Methods of forming conductive and insulating layersSTATS CHIPPAC PTE LTD·Filed 2016·Granted Jan 9, 2018·2 cites·25 claims
- 4675US9269691B2Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposerSTATS CHIPPAC LTD·Filed 2013·Granted Feb 23, 2016·3 cites·24 claims
- 4774US8247894B2Integrated circuit package system with step mold recessYOON IN SANG·Filed 2008·Granted Aug 21, 2012·6 cites·20 claims
- 4871US9355939B2Integrated circuit package stacking system with shielding and method of manufacture thereofCHO NAMJU·Filed 2010·Granted May 31, 2016·3 cites·20 claims
- 4970US9230898B2Integrated circuit packaging system with package-on-package and method of manufacture thereofSHIN HANGIL·Filed 2009·Granted Jan 5, 2016·4 cites·18 claims
- 5070US8080446B2Integrated circuit packaging system with interposer interconnections and method of manufacture thereofCHOI A LEAM·Filed 2009·Granted Dec 20, 2011·4 cites·20 claims
Showing the top 50 of 64 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →