Integrated circuit packaging system with single metal layer interposer and method of manufacture thereof

Abstract

An integrated circuit packaging system and method of manufacture thereof including: a base substrate; an integrated circuit die on the base substrate; vertical interconnects attached to the base substrate around the integrated circuit die; and a single metal layer interposer mounted on the vertical interconnects, the single metal layer interposer including: a routing pattern having interposer contacts and traces, and a dielectric layer on the interposer contacts and traces, a top surface of the interposer contacts coplanar with a top surface of the dielectric layer.

What is claimed is: 
     
       1. A method of manufacture of an integrated circuit packaging system comprising:
 providing a base substrate; 
 mounting an integrated circuit die on the base substrate; 
 attaching vertical interconnects to the base substrate around the integrated circuit die; 
 forming a single metal layer interposer including:
 providing a leadframe having interposer contacts, 
 applying a dielectric layer to the leadframe, and 
 removing a portion of the leadframe for forming a routing pattern with the interposer contacts and traces, a top surface of the interposer contacts coplanar with a top surface of the dielectric layer; and 
 
 mounting the single metal layer interposer on the vertical interconnects. 
 
     
     
       2. The method as claimed in  claim 1  further comprising encapsulating the integrated circuit die and the vertical interconnects with a package body. 
     
     
       3. The method as claimed in  claim 1  wherein mounting the single metal layer interposer on the vertical interconnects includes positioning the dielectric layer on the package body. 
     
     
       4. The method as claimed in  claim 1  wherein forming the single metal layer interposer includes forming conductive posts through the dielectric layer. 
     
     
       5. The method as claimed in  claim 1  further comprising attaching external connectors to the base substrate. 
     
     
       6. A method of manufacture of an integrated circuit packaging system comprising:
 providing a base substrate; 
 mounting an integrated circuit die on the base substrate; 
 attaching vertical interconnects to the base substrate around the integrated circuit die; 
 encapsulating the integrated circuit die and the vertical interconnects with a package body; 
 forming a single metal layer interposer including:
 providing a leadframe having interposer contacts, 
 applying a dielectric layer to the leadframe, 
 forming conductive posts through the dielectric layer, and 
 removing a portion of the leadframe for forming a routing pattern with the interposer contacts and traces, a top surface of the interposer contacts coplanar with a top surface of the dielectric layer; and 
 
 mounting the conductive posts of the single metal layer interposer on the vertical interconnects, the dielectric layer on the package body. 
 
     
     
       7. The method as claimed in  claim 6  further comprising applying underfill between the base substrate and the integrated circuit die. 
     
     
       8. The method as claimed in  claim 6  wherein attaching the vertical interconnects to the base substrate includes attaching solder balls to the base substrate. 
     
     
       9. The method as claimed in  claim 6  wherein attaching the vertical interconnects to the base substrate includes attaching a conductive core surrounded by a solder layer to the base substrate. 
     
     
       10. The method as claimed in  claim 6  wherein forming conductive posts through the dielectric layer includes:
 forming holes in the dielectric layer for exposing some of the interposer contacts; and 
 depositing solder in the holes in the dielectric layer and on the interposer contacts. 
 
     
     
       11. An integrated circuit packaging system comprising:
 a base substrate; 
 an integrated circuit die on the base substrate; 
 vertical interconnects attached to the base substrate around the integrated circuit die; and 
 a single metal layer interposer mounted on the vertical interconnects, the single metal layer interposer including:
 a routing pattern having interposer contacts and traces, and 
 a dielectric layer on the interposer contacts and traces, a top surface of the interposer contacts coplanar with a top surface of the dielectric layer. 
 
 
     
     
       12. The system as claimed in  claim 11  further comprising a package body encapsulating the integrated circuit die and the vertical interconnects. 
     
     
       13. The system as claimed in  claim 11  wherein the dielectric layer is on the package body. 
     
     
       14. The system as claimed in  claim 11  further comprising conductive posts formed through the dielectric layer. 
     
     
       15. The system as claimed in  claim 11  further comprising external connectors attached to the base substrate. 
     
     
       16. The system as claimed in  claim 11  further comprising:
 a package body encapsulating the integrated circuit die and the vertical interconnects; 
 conductive posts formed through the dielectric layer; 
 
       wherein:
 the dielectric layer is on the package body. 
 
     
     
       17. The system as claimed in  claim 16  further comprising underfill between the base substrate and the integrated circuit die. 
     
     
       18. The system as claimed in  claim 16  wherein the vertical interconnects are solder balls. 
     
     
       19. The system as claimed in  claim 16  wherein the vertical interconnects are a conductive core surrounded by a solder layer. 
     
     
       20. The system as claimed in  claim 16  wherein the conductive posts are formed from solder.