Inventor · disambiguated record
Benjamin D. Briggs
Also filed as: BRIGGS BENJAMIN D · BRIGGS BENJAMIN DAVID
191 granted patents·30 pending applications·1,248 citations·filing 2015–2024
99Inventor score
Top patents by PatentIndex Score
221 records- 0199US10229851B2Self-forming barrier for use in air gap formationIBM·Filed 2016·Granted Mar 12, 2019·317 cites·14 claims
- 0299US9837355B2Method for maximizing air gap in back end of the line interconnect through via landing modificationIBM·Filed 2016·Granted Dec 5, 2017·313 cites·5 claims
- 0398US11056429B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceTESSERA INC·Filed 2020·Granted Jul 6, 2021·4 cites·19 claims
- 0498US10395986B1Fully aligned via employing selective metal depositionIBM·Filed 2018·Granted Aug 27, 2019·24 cites·19 claims
- 0598US10020223B1Reduced tip-to-tip and via pitch at line endIBM·Filed 2017·Granted Jul 10, 2018·30 cites·4 claims
- 0698US9953865B1Structure and method to improve FAV RIE process margin and electromigrationIBM·Filed 2016·Granted Apr 24, 2018·23 cites·20 claims
- 0798US9911651B1Skip-vias bypassing a metallization level at minimum pitchIBM·Filed 2016·Granted Mar 6, 2018·26 cites·16 claims
- 0898US9685406B1Selective and non-selective barrier layer wet removalIBM·Filed 2016·Granted Jun 20, 2017·34 cites·14 claims
- 0997US12218003B2Selective ILD deposition for fully aligned via with airgapADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2023·Granted Feb 4, 2025·2 cites·20 claims
- 1097US9966337B1Fully aligned via with integrated air gapsIBM·Filed 2017·Granted May 8, 2018·22 cites·12 claims
- 1197US9917137B1Integrated magnetic tunnel junction (MTJ) in back end of line (BEOL) interconnectsIBM·Filed 2017·Granted Mar 13, 2018·14 cites·20 claims
- 1297US9553019B1Airgap protection layer for via alignmentIBM·Filed 2016·Granted Jan 24, 2017·20 cites·20 claims
- 1396US10777411B1Semiconductor device with selective dielectric depositionIBM·Filed 2019·Granted Sep 15, 2020·20 cites·18 claims
- 1496US10090247B1Semiconductor device formed by wet etch removal of Ru selective to other metalsIBM·Filed 2017·Granted Oct 2, 2018·13 cites·14 claims
- 1596US9754883B1Hybrid metal interconnects with a bamboo grain microstructureIBM·Filed 2016·Granted Sep 5, 2017·14 cites·14 claims
- 1695US11955424B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2023·Granted Apr 9, 2024·1 cites·20 claims
- 1795US11586067B2Structure and method of advanced LCoS back-plane having robust pixel via metallizationAPPLIED MATERIALS INC·Filed 2020·Granted Feb 21, 2023·5 cites·18 claims
- 1895US11573452B2Method for LCoS DBR multilayer stack protection via sacrificial hardmask for RIE and CMP processesAPPLIED MATERIALS INC·Filed 2020·Granted Feb 7, 2023·5 cites·17 claims
- 1995US11574864B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceTESSERA LLC·Filed 2021·Granted Feb 7, 2023·2 cites·21 claims
- 2095US10297750B1Wraparound top electrode line for crossbar array resistive switching deviceIBM·Filed 2017·Granted May 21, 2019·11 cites·20 claims
- 2195US10109579B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceIBM·Filed 2018·Granted Oct 23, 2018·8 cites·20 claims
- 2295US10046601B2Smartwatch blackboxIBM·Filed 2017·Granted Aug 14, 2018·3 cites·20 claims
- 2395US9780035B1Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnectsIBM·Filed 2016·Granted Oct 3, 2017·10 cites·25 claims
- 2494US10195901B2Smartwatch blackboxIBM·Filed 2017·Granted Feb 5, 2019·3 cites·20 claims
- 2594US10083905B2Skip-vias bypassing a metallization level at minimum pitchIBM·Filed 2017·Granted Sep 25, 2018·9 cites·19 claims
- 2694US9685366B1Forming chamferless vias using thermally decomposable porefillerIBM·Filed 2016·Granted Jun 20, 2017·12 cites·11 claims
- 2793US10366952B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceIBM·Filed 2018·Granted Jul 30, 2019·5 cites·17 claims
- 2893US10361157B2Method of manufacturing self-aligned interconnects by deposition of a non-conformal air-gap forming layer having an undulated upper surfaceIBM·Filed 2017·Granted Jul 23, 2019·6 cites·8 claims
- 2993US10049920B1Reduced tip-to-tip and via pitch at line endIBM·Filed 2017·Granted Aug 14, 2018·8 cites·15 claims
- 3093US10002831B2Selective and non-selective barrier layer wet removalIBM·Filed 2017·Granted Jun 19, 2018·7 cites·15 claims
- 3193US9985199B1Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shieldIBM·Filed 2017·Granted May 29, 2018·8 cites·13 claims
- 3293US9837305B1Forming deep airgaps without flop overIBM·Filed 2016·Granted Dec 5, 2017·10 cites·20 claims
- 3393US9806023B1Selective and non-selective barrier layer wet removalIBM·Filed 2017·Granted Oct 31, 2017·8 cites·20 claims
- 3493US9548243B1Self aligned via and pillar cut for at least a self aligned double pitchIBM·Filed 2015·Granted Jan 17, 2017·7 cites·16 claims
- 3593US9431205B1Fold over emitter and collector field emission transistorIBM·Filed 2015·Granted Aug 30, 2016·8 cites·2 claims
- 3692US10204828B1Enabling low resistance gates and contacts integrated with bilayer dielectricsIBM·Filed 2018·Granted Feb 12, 2019·8 cites·20 claims
- 3792US9793206B1Heterogeneous metallization using solid diffusion removal of metal interconnectsIBM·Filed 2016·Granted Oct 17, 2017·8 cites·10 claims
- 3892US9418934B1Structure and fabrication method for electromigration immortal nanoscale interconnectsIBM·Filed 2015·Granted Aug 16, 2016·10 cites·25 claims
- 3991US11837501B2Selective recessing to form a fully aligned viaADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2022·Granted Dec 5, 2023·1 cites·26 claims
- 4091US10964588B2Selective ILD deposition for fully aligned via with airgapTESSERA INC·Filed 2020·Granted Mar 30, 2021·2 cites·17 claims
- 4191US10746782B2Accelerated wafer testing using non-destructive and localized stressIBM·Filed 2017·Granted Aug 18, 2020·4 cites·16 claims
- 4291US10276190B2Sentiment analysis of mental health disorder symptomsIBM·Filed 2017·Granted Apr 30, 2019·9 cites·15 claims
- 4391US9997451B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceIBM·Filed 2016·Granted Jun 12, 2018·5 cites·16 claims
- 4491US9941088B2Fold over emitter and collector field emission transistorIBM·Filed 2016·Granted Apr 10, 2018·6 cites·9 claims
- 4591US9881833B1Barrier planarization for interconnect metallizationIBM·Filed 2016·Granted Jan 30, 2018·6 cites·16 claims
- 4691US9666474B2Uniform dielectric recess depth during fin revealIBM·Filed 2015·Granted May 30, 2017·5 cites·7 claims
- 4790US10629529B2Semiconductor device including a porous dielectric layer, and method of forming the semiconductor deviceTESSERA INC·Filed 2019·Granted Apr 21, 2020·3 cites·19 claims
- 4890US10559498B2Location-specific laser annealing to improve interconnect microstructureIBM·Filed 2019·Granted Feb 11, 2020·2 cites·20 claims
- 4990US9418327B1Security key systemIBM·Filed 2016·Granted Aug 16, 2016·6 cites·6 claims
- 5090US2025140611A1Selective recessing to form a fully aligned viaADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2024·Application pending·0 cites
Showing the top 50 of 221 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →