Assignee
TESSERA LLC
US37 patents
Top patents by PatentIndex Score
US11581190B2Feb 14, 2023
Method of fabricating semiconductor fins by differentially oxidizing mandrel sidewalls
TESSERA LLC4 citations86
US11615988B2Mar 28, 2023
FinFET devices
TESSERA LLC2 citations84
US11538720B2Dec 27, 2022
Stacked transistors with different channel widths
TESSERA LLC5 citations84
US11798852B2Oct 24, 2023
Hybrid-channel nano-sheet FETs
TESSERA LLC1 citations73
US11776957B2Oct 3, 2023
Gate cut with integrated etch stop layer
TESSERA LLC1 citations73
US11710658B2Jul 25, 2023
Structure and method to improve FAV RIE process margin and Electromigration
TESSERA LLC1 citations73
US11699591B2Jul 11, 2023
Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic
TESSERA LLC2 citations73
US11682715B2Jun 20, 2023
Forming nanosheet transistor using sacrificial spacer and inner spacers
TESSERA LLC1 citations73
US11670510B2Jun 6, 2023
Self aligned pattern formation post spacer etchback in tight pitch configurations
TESSERA LLC1 citations73
US11664375B2May 30, 2023
Minimizing shorting between FinFET epitaxial regions
TESSERA LLC1 citations73
US11658062B2May 23, 2023
Air gap spacer formation for nano-scale semiconductor devices
TESSERA LLC2 citations73
US11652161B2May 16, 2023
Nanosheet channel-to-source and drain isolation
TESSERA LLC2 citations73
US11610780B2Mar 21, 2023
Alternating hardmasks for tight-pitch line formation
TESSERA LLC2 citations73
US11587830B2Feb 21, 2023
Self-forming barrier for use in air gap formation
TESSERA LLC1 citations73
US11574844B2Feb 7, 2023
Fabrication of a vertical fin field effect transistor with reduced dimensional variations
TESSERA LLC2 citations73
US11574864B2Feb 7, 2023
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
TESSERA LLC2 citations73
US11557589B2Jan 17, 2023
Air gap spacer for metal gates
TESSERA LLC1 citations73
US11552077B2Jan 10, 2023
Gate cut with integrated etch stop layer
TESSERA LLC2 citations73
US11424211B2Aug 23, 2022
Package-on-package assembly with wire bonds to encapsulation surface
TESSERA LLC1 citations73
US11404560B2Aug 2, 2022
Punch through stopper in bulk finFET device
TESSERA LLC2 citations73
USRE50494EJul 15, 2025
Self-forming embedded diffusion barriers
TESSERA LLC0 citations63
US12074165B2Aug 27, 2024
Gate cut with integrated etch stop layer
TESSERA LLC0 citations63
US12062703B2Aug 13, 2024
Self aligned replacement metal source/drain FINFET
TESSERA LLC0 citations63
US11978639B2May 7, 2024
Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic
TESSERA LLC0 citations63
USRE49954EApr 30, 2024
Fabrication of nano-sheet transistors with different threshold voltages
TESSERA LLC0 citations63
US11804405B2Oct 31, 2023
Method of forming copper interconnect structure with manganese barrier layer
TESSERA LLC0 citations63
US11676854B2Jun 13, 2023
Selective ILD deposition for fully aligned via with airgap
TESSERA LLC0 citations63
US11488862B2Nov 1, 2022
Semiconductor device with reduced via resistance
TESSERA LLC0 citations63
US11456354B2Sep 27, 2022
Bulk nanosheet with dielectric isolation
TESSERA LLC0 citations63
US11380583B2Jul 5, 2022
Forming self-aligned vias and air-gaps in semiconductor fabrication
TESSERA LLC0 citations63
USRE50174EOct 15, 2024
Structure and process to tuck fin tips self-aligned to gates
TESSERA LLC0 citations62
US12106963B2Oct 1, 2024
Self aligned pattern formation post spacer etchback in tight pitch configurations
TESSERA LLC0 citations62
US12087685B2Sep 10, 2024
Semiconductor interconnect structure with double conductors
TESSERA LLC0 citations62
US12033892B2Jul 9, 2024
Structure and method to improve FAV RIE process margin and electromigration
TESSERA LLC0 citations62
US11929286B2Mar 12, 2024
Two dimension material fin sidewall
TESSERA LLC0 citations62
US11522045B2Dec 6, 2022
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack
TESSERA LLC0 citations62
US11424365B2Aug 23, 2022
Two dimension material fin sidewall
TESSERA LLC0 citations62