USRE49954EActiveUtility

Fabrication of nano-sheet transistors with different threshold voltages

76
Assignee: TESSERA LLCPriority: Sep 19, 2016Filed: Jun 3, 2021Granted: Apr 30, 2024
Est. expirySep 19, 2036(~10.2 yrs left)· nominal 20-yr term from priority
H10P 14/3462H10D 30/43H10D 30/014H10D 86/011H10D 86/01H10D 84/0193H10D 84/0167H10D 84/0158H10D 84/0128H10D 84/83H10D 84/038H10D 64/671H10D 64/017H10D 64/01H10D 62/121H10D 62/118H10D 30/6757H10D 30/6743H10D 30/6735H10D 64/518H10D 84/0147H01L 29/0673H01L 27/088H01L 21/02603H01L 21/823412H01L 21/823431H01L 21/823807H01L 21/823821H01L 21/84H01L 21/845H01L 29/0665H01L 29/401H01L 29/42376H01L 29/42392H01L 29/4983H01L 29/66439H01L 29/66545H01L 29/775H01L 29/78651H01L 29/78696
76
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Cited by
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References
41
Claims

Abstract

A method of forming two or more nano-sheet devices with varying electrical gate lengths, including, forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate, removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess having a recess depth in the at least one alternating nano-sheet channel layers, where the recess depth is greater than the indentation depth.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
 forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate; 
 removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers; 
 removing a portion of the at least one alternating nano-sheet channel layer in a first of the at least two cut-stacks to form a first recess having a first recess depth in the at least one alternating nano-sheet channel layer; and 
 removing a portion of the at least one alternating nano-sheet channel layer in a second of the at least two cut-stacks to provide two different channel lengths. 
 
     
     
       2. The method of  claim 1 , further comprising forming the plurality of sacrificial release layers and the at least one alternating nano-sheet channel layer on the substrate by an epitaxially growth process, patterning and etching the plurality of sacrificial release layers and the at least one alternating nano-sheet channel layer to form a channel stack, and forming a dummy gate on the channel stack. 
     
     
       3. The method of  claim 2 , wherein the at least two cut-stacks are formed from the same channel stack. 
     
     
       4. The method of  claim 1 , further comprising forming a mask on at least one of the at least two cut-stacks after removing a portion of the plurality of sacrificial release layers, and removing an additional portion of the plurality of sacrificial release layers from the unmasked cut-stacks. 
     
     
       5. The method of  claim 4 , wherein the additional portion of the plurality of sacrificial release layers is removed using an isotropic wet etch. 
     
     
       6. The method of  claim 1 , further comprising foaming forming a mask on at least one of the at least two cut-stacks before removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the unmasked cut-stacks. 
     
     
       7. The method of  claim 6 , further comprising removing the mask from the at least one of the at least two cut-stacks after removing a portion of the at least one alternating nano-sheet channel layer, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the previously masked at least one of the at least two cut-stacks and an additional portion of the at least one alternating nano-sheet channel layer from the unmasked at least one of the at least two cut-stacks. 
     
     
       8. The method of  claim 1 , further comprising forming a source/drain on each of the at least two cut-stacks. 
     
     
       9. The method of  claim 8 , wherein the source/drains are epitaxially grown on the exposed surfaces of the at least one alternating nano-sheet channel layer. 
     
     
       10. A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
 forming a channel stack including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate; 
 forming at least two or more cut-stacks from the channel stack, where each of the at least two or more cut-stacks includes a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer; 
 removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers; 
 forming an indentation fill layer in the indentations; 
 forming a mask on at least one of the two or more cut-stacks; and 
 removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the unmasked cut-stacks. 
 
     
     
       11. The method of  claim 10 , further comprising removing the mask from the at least one of the two or more cut-stacks after removing a portion of the at least one alternating nano-sheet channel layer, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the previously masked at least one of the two or more cut-stacks and an additional portion of the at least one alternating nano-sheet channel layer from the at least one unmasked of the two or more cut-stacks. 
     
     
       12. The method of  claim 11 , further comprising forming a source/drain on each of the two or more cut-stacks. 
     
     
       13. The method of  claim 12 , further comprising forming a gate structure on each of the two or more cut-stacks. 
     
     
       14. A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
 forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate; 
 removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers; and 
 removing a portion of the at least one alternating nano-sheet channel layer to form a recess having a recess depth in the at least one alternating nano-sheet channel layer, wherein the one of the two or more nano-sheet devices has a different threshold voltage, V T , than the other of the two or more nano-sheet devices by altering the length of the at least one alternating nano-sheet channel layer. 
 
     
     
       15. The method of  claim 14 , wherein an isotropic etch forms the indentations having a predetermined indentation depth in the range of about 2 nm to about 10 nm. 
     
     
       16. The method of  claim 14 , wherein the sacrificial release layers have a thickness in the range of about 5 nm to about 20 nm. 
     
     
       17. The method of  claim 14 , wherein the sacrificial release layers are silicon-germanium (SiGe). 
     
     
       18. The method of  claim 14 , wherein the at least one alternating nano-sheet channel layer is epitaxially grown on a crystalline surface of the substrate. 
     
     
       19. The method of  claim 14 , wherein the at least one alternating nano-sheet channel layer is a single crystal silicon layer on a crystalline sacrificial release layer. 
     
     
       20. A method of forming nano-sheet devices, the method comprising:
 providing at least two dummy gate structures, each of the dummy gate structures (i) disposed on a cut-stack comprising alternating sacrificial release layers and nano-sheet channel layers and (ii) comprising opposing side spacers, each side spacer having opposing inside and outside surfaces;   forming first lateral indentations of a first depth in a first plurality of sacrificial release layers of a first cut-stack;   forming second lateral indentations of a second depth in a second plurality of sacrificial release layers of a second cut-stack, wherein the second depth is greater than the first depth; and   filling the first lateral indentations in the first cut-stack and the second lateral indentations in the second cut-stack with a dielectric material.    
     
     
       21. The method of claim 20, further comprising:
 forming third lateral indentations to a third depth in sacrificial release layers of a third cut-stack, wherein the third depth is greater than the second depth.    
     
     
       22. The method of claim 20, wherein the first depth is less than a distance between the opposing inside and outside surfaces of a side spacer of the first dummy gate structure.  
     
     
       23. The method of claim 20, wherein the second depth is greater than a distance between the opposing inside and outside surfaces of a side spacer of the second dummy gate structure.  
     
     
       24. The method of claim 20, wherein forming the second lateral indentations in the second cut-stack comprises:
 laterally etching sacrificial release layers of an unmasked second cut-stack.    
     
     
       25. The method of claim 20, further comprising:
 subsequent to filling the first lateral indentations and the second lateral indentations, epitaxially growing a source/drain material on exposed faces of nano-sheet channel layers of the first cut-stack and the second cut-stack.    
     
     
       26. The method of claim 25, further comprising:
 subsequent to epitaxially growing the source/drain material, replacing the dummy gate structures with active gate structures.    
     
     
       27. The method of claim 20, wherein the first depth is in a range of about 2 nm and about 5 nm and second depth is in a range of about 5 nm and about 10 nm.  
     
     
       28. The method of claim 20, wherein an uppermost layer of the alternating sacrificial release layers and nano-sheet channel layers of a cut-stack is a sacrificial release layer.  
     
     
       29. The method of claim 20, wherein providing the at least two dummy gate structures comprises using a double patterning process.  
     
     
       30. A method of forming nano-sheet devices comprising:
 providing at least two dummy gate structures, each of the dummy gate structures (i) disposed on a cut-stack comprising alternating sacrificial release layers and nano-sheet channel layers, (ii) comprising opposing side spacers, each side spacer having opposing inside and outside surfaces, the opposing inside surfaces being a distance apart, and (iii) having the distance between opposing inside surfaces being substantially the same;   recessing end portions of first nano-sheet channel layers of a first cut-stack to a first depth;   recessing end portions of second nano-sheet channel layers of a second cut-stack to a second depth, wherein the second depth is greater than the first depth;   forming source/drain regions contacting each of the first and second nano-sheet channel layers; and   replacing the dummy gate structures with active gate structures.    
     
     
       31. The method of claim 30, further comprising:
 recessing end portions of third nano-sheet channel layers of a third cut-stack to a third depth, wherein the third depth is greater than the second depth.    
     
     
       32. The method of claim 30, wherein recessing end portions of the second nano-sheet channel layers comprises:
 laterally etching nano-sheet channel layers of an unmasked second cut-stack.    
     
     
       33. The method of claim 30, wherein the first and second cut-stacks comprise nano-sheet channel layers of a length in a range of about 19 nm and about 25 nm.  
     
     
       34. The method of claim 30, wherein a difference between a first length of the first nanosheet channel layers of the first cut-stack and a second length of the second nanosheet channel layers of the second cut-stack is in a range of about 2 nm to about 5 nm.  
     
     
       35. The method of claim 30, wherein a distance separating opposing source/drain regions of the first cut-stack is greater than a distance separating opposing source/drain regions of the second cut-stack.  
     
     
       36. The method of claim 30, wherein an uppermost layer of the alternating sacrificial release layers and nano-sheet channel layers is a sacrificial release layer.  
     
     
       37. The method of claim 30, wherein providing the at least two dummy gate structures comprises using a double patterning process.  
     
     
       38. The method of claim 30, further comprising:
 prior to recessing the end portions of the first nano-sheet channel layers of the first cut-stack:
 forming first lateral indentations to a third depth in the sacrificial release layers of the first cut-stack; and 
 forming second lateral indentations to a fourth depth in the sacrificial release layers of the second cut-stack, wherein the fourth depth is greater than the third depth.  
   
     
     
       39. The method of claim 38, further comprising:
 filling the first lateral indentations in the first cut-stack and the second lateral indentations in the second cut-stack with a dielectric material.    
     
     
       40. A method of forming nano-sheet devices comprising:
 providing at least two dummy gate structures, each of the dummy gate structures (i) disposed on cut-stacks comprising alternating sacrificial release layers and nano-sheet channel layers, (ii) comprising opposing side spacers, each side spacer having opposing inside and outside surfaces, the opposing inside surfaces being a distance apart, and (iii) having the distance between opposing inside surfaces being substantially the same;   recessing end portions of a plurality of nano-sheet channel layers of a first cut-stack to a first depth;   recessing end portions of a plurality of nano-sheet channel layers of a second cut-stack to a second depth, wherein the second depth is greater than the first depth;   forming source/drain regions contacting each of the plurality of first and second nano-sheet channel layers, wherein a distance separating opposing source/drain regions of the first cut-stack is greater than a distance separating opposing source/drain regions of the second cut-stack;   replacing the dummy gate structures with active gate structures.    
     
     
       41. The method of claim 40, further comprising:
 recessing end portions of a plurality of nano-sheet channel layers of a third cut-stack to a third depth, wherein the third depth is greater than the second depth.

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