Method of forming copper interconnect structure with manganese barrier layer
Abstract
Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method comprising:
providing a wafer comprising a dielectric layer, wherein the dielectric layer includes an opening defined therein;
forming an interconnect structure comprising manganese in the opening;
forming a metallic capping layer above the opening of the dielectric layer on an upper surface of the interconnect structure; and
annealing the wafer to form a first self-aligned barrier layer on an outer surface of the metallic capping layer, wherein the first self-aligned barrier layer comprises manganese and oxygen.
2. The method of claim 1 , wherein the interconnect structure comprises a first layer comprising cobalt lining the opening.
3. The method of claim 1 , wherein the interconnect structure comprises an underlying barrier layer comprising tantalum nitride lining the opening.
4. The method of claim 1 , wherein the metallic capping layer comprises cobalt.
5. The method of claim 1 , wherein the metallic capping layer comprises ruthenium.
6. The method of claim 1 , wherein the metallic capping layer comprises nickel.
7. The method of claim 1 , wherein:
the opening is defined in the dielectric layer by sidewalls and a bottom surface; and
and the interconnect structure comprises:
an underlying barrier layer adjacent to (i) the sidewalls and (ii) the bottom surface;
a copper-manganese layer adjacent to the underlying barrier layer; and
a copper body adjacent to the copper-manganese layer and filling a remaining portion of the opening.
8. The method of claim 1 , wherein forming the metallic capping layer on the interconnect structure comprises selectively forming the metallic capping layer on the interconnect structure.
9. The method of claim 1 , further comprising oxidizing the outer surface of the metallic capping layer prior to annealing.
10. A method comprising:
providing a wafer comprising a dielectric layer, wherein the dielectric layer includes an opening defined therein;
forming an interconnect structure comprising manganese in the opening;
forming a metallic capping layer on an upper surface of the interconnect structure; and
annealing the wafer to form a first self-aligned barrier layer on the metallic capping layer, wherein:
the first self-aligned barrier layer comprises manganese and oxygen;
the opening is defined in the dielectric layer by sidewalls and a bottom surface; and
the interconnect structure comprises:
a first layer adjacent to (i) the sidewalls and (ii) the bottom surface;
a copper-manganese layer adjacent to the first layer; and
a copper body adjacent to the copper-manganese layer and filling a remaining portion of the opening.
11. The method of claim 10 , wherein the first layer comprises cobalt.
12. The method of claim 11 , wherein a second self-aligned barrier layer is formed adjacent to (i) an outer bottom surface of the first layer and (ii) a first and a second opposing outer sidewall surface of the first layer.
13. A method of manufacturing an integrated circuit, the method comprising:
providing a wafer comprising a dielectric layer having an opening defined therein;
forming an interconnect structure comprising manganese in the opening;
forming a metallic capping layer comprising cobalt above the opening of the dielectric layer on an upper surface of the interconnect structure; and
forming a first self-aligned barrier layer on an outer surface of the metallic capping layer, wherein the first self-aligned barrier layer comprises manganese and oxygen.
14. The method of claim 13 , wherein:
the opening is defined in the dielectric layer by sidewalls and a bottom surface; and
the interconnect structure comprises:
an underlying barrier layer adjacent to (i) the sidewalls and (ii) the bottom surface;
a copper-manganese layer adjacent to the underlying barrier layer; and
a copper body adjacent to the copper-manganese layer and filling a remaining portion of the opening.
15. The method of claim 14 , wherein the underlying barrier layer comprises tantalum nitride.
16. The method of claim 13 , wherein forming the metallic capping layer on the interconnect structure comprises selectively forming the metallic capping layer on the interconnect structure.
17. The method of claim 13 , further comprising oxidizing the outer surface of the metallic capping layer prior to annealing.
18. A method of manufacturing an integrated circuit, the method comprising:
providing a wafer comprising a dielectric layer having an opening defined therein;
forming an interconnect structure comprising manganese in the opening;
forming a metallic capping layer comprising cobalt on an upper surface of the interconnect structure; and
forming a first self-aligned barrier layer on the metallic capping layer, wherein the first self-aligned barrier layer comprises manganese and oxygen, wherein:
the opening is defined in the dielectric layer by sidewalls and a bottom surface; and
the interconnect structure comprises:
an first layer adjacent to (i) the sidewalls and (ii) the bottom surface;
a copper-manganese layer adjacent to the first layer; and
a copper body adjacent to the copper-manganese layer and filling a remaining portion of the opening.
19. The method of claim 18 , wherein the first layer comprises cobalt.
20. The method of claim 18 , wherein a second self-aligned barrier layer is formed adjacent to (i) an outer bottom surface of the first layer and (ii) a first and a second opposing outer sidewall surface of the first layer.Cited by (0)
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