Inventor · disambiguated record
Dina H. Triyoso
Also filed as: TRIYOSO DINA · TRIYOSO DINA H
39 granted patents·13 pending applications·900 citations·filing 2002–2024
97Inventor score
Files withFREESCALE SEMICONDUCTOR INC17GLOBALFOUNDRIES INC17TOKYO ELECTRON LTD10GLOBAL FOUNDRIES INC2TRIYOSO DINA2
Top patents by PatentIndex Score
52 records- 0197US7132360B2Method for treating a semiconductor surface to form a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Nov 7, 2006·590 cites·33 claims
- 0295US9209186B1Threshold voltage control for mixed-type non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Dec 8, 2015·20 cites·13 claims
- 0392US9362284B2Threshold voltage control for mixed-type non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 7, 2016·7 cites·7 claims
- 0492US9269785B2Semiconductor device with ferroelectric hafnium oxide and method for forming semiconductor deviceGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 23, 2016·15 cites·18 claims
- 0592US8383473B1Methods of forming replacement gate structures for semiconductor devicesGLOBALFOUNDRIES INC·Filed 2012·Granted Feb 26, 2013·11 cites·22 claims
- 0691US7091568B2Electronic device including dielectric layer, and a process for forming the electronic deviceFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Aug 15, 2006·59 cites·20 claims
- 0790US7015153B1Method for forming a layer using a purging gas in a semiconductor processFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Mar 21, 2006·56 cites·19 claims
- 0889US9466661B2Method of fabricating a MIM capacitor with minimal voltage coefficient and a decoupling MIM capacitor and analog/RF MIM capacitor on the same chip with high-K dielectricsGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 11, 2016·10 cites·10 claims
- 0988US9318315B2Complex circuit element and capacitor utilizing CMOS compatible antiferroelectric high-k materialsGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 19, 2016·13 cites·23 claims
- 1088US7230264B2Semiconductor transistor having structural elements of differing materialsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jun 12, 2007·14 cites·10 claims
- 1186US9583557B2Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetimeGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 28, 2017·5 cites·14 claims
- 1286US7297586B2Gate dielectric and metal gate integrationFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Nov 20, 2007·13 cites·17 claims
- 1381US8791003B2Methods for fabricating integrated circuits with fluorine passivationTRIYOSO DINA·Filed 2012·Granted Jul 29, 2014·6 cites·20 claims
- 1479US6979622B1Semiconductor transistor having structural elements of differing materials and method of formationFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Dec 27, 2005·21 cites·16 claims
- 1577US8420519B1Methods for fabricating integrated circuits with controlled P-channel threshold voltageTRIYOSO DINA·Filed 2011·Granted Apr 16, 2013·5 cites·19 claims
- 1676US8652890B2Methods for fabricating integrated circuits with narrow, metal filled openingsSCHMIDBAUER SVEN·Filed 2012·Granted Feb 18, 2014·6 cites·17 claims
- 1776US7303983B2ALD gate electrodeFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Dec 4, 2007·6 cites·20 claims
- 1875US8039386B1Method for forming a through silicon via (TSV)FREESCALE SEMICONDUCTOR INC·Filed 2010·Granted Oct 18, 2011·4 cites·20 claims
- 1975US7659156B2Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layerFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Feb 9, 2010·5 cites·19 claims
- 2075US7618902B2Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Nov 17, 2009·4 cites·20 claims
- 2175US2025120154A1Semiconductor Manufacturing Platform with In-Situ Electrical Bias and Methods ThereofTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 2272US9530833B2Semiconductor structure including capacitors having different capacitor dielectrics and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2014·Granted Dec 27, 2016·3 cites·20 claims
- 2368US8404594B2Reverse ALDTRIYOSO DINA H·Filed 2005·Granted Mar 26, 2013·4 cites·17 claims
- 2467US7776731B2Method of removing defects from a dielectric material in a semiconductorFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Aug 17, 2010·2 cites·20 claims
- 2566US12211907B2Semiconductor manufacturing platform with in-situ electrical bias and methods thereofTOKYO ELECTRON LTD·Filed 2021·Granted Jan 28, 2025·0 cites·20 claims
- 2664US7071038B2Method of forming a semiconductor device having a dielectric layer with high dielectric constantFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jul 4, 2006·10 cites·36 claims
- 2762US2025185253A1Methods of forming ferroelectric devicesTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 2861US6835671B2Method of making an integrated circuit using an EUV mask formed by atomic layer depositionFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Dec 28, 2004·6 cites·26 claims
- 2959US12406887B2Selective film formation using a self-assembled monolayerTOKYO ELECTRON LTD·Filed 2022·Granted Sep 2, 2025·0 cites·20 claims
- 3059US7911002B2Semiconductor device with selectively modulated gate work functionFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Mar 22, 2011·1 cites·19 claims
- 3159US2025126804A1Memory cell arrangement and methodsFERROELECTRIC MEMORY GMBH·Filed 2023·Application pending·0 cites
- 3258US8030220B2Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Oct 4, 2011·0 cites·17 claims
- 3358US2024128308A1Method for fabricating a ferroelectric deviceTOKYO ELECTRON LTD·Filed 2023·Application pending·0 cites
- 3456US2025140551A1Method of forming a memory device in a recessed featureTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 3554US11894240B2Semiconductor processing systems with in-situ electrical biasTOKYO ELECTRON LTD·Filed 2021·Granted Feb 6, 2024·0 cites·23 claims
- 3654US11882776B2In-situ encapsulation of metal-insulator-metal (MIM) stacks for resistive random access memory (RERAM) cellsTOKYO ELECTRON LTD·Filed 2021·Granted Jan 23, 2024·0 cites·20 claims
- 3752US8716149B2Methods for fabricating integrated circuits having improved spacersKOEHLER FABIAN·Filed 2012·Granted May 6, 2014·1 cites·20 claims
- 3852US6987063B2Method to reduce impurity elements during semiconductor film depositionFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jan 17, 2006·3 cites·32 claims
- 3952US2018315832A1Method for late differential soi thinning for improved fdsoi performance and hci optimizationGLOBALFOUNDRIES INC·Filed 2018·Application pending·0 cites
- 4052US2022223608A1Bilayer dielectric stack for a ferroelectric tunnel junction and method of formingTOKYO ELECTRON LTD·Filed 2022·Application pending·0 cites
- 4151US2013270656A1Replacement gate structures for semiconductor devicesGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 4250US10050119B2Method for late differential SOI thinning for improved FDSOI performance and HCI optimizationGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 14, 2018·0 cites·11 claims
- 4349US11915973B2Self-assembled monolayers as sacrificial capping layersTOKYO ELECTRON LTD·Filed 2020·Granted Feb 27, 2024·0 cites·22 claims
- 4448US2015146341A1ALD dielectric films with leakage-reducing impurity layersGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 4547US9917016B2Integrated circuits and methods of forming the same with effective dummy gate cap removalGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 13, 2018·0 cites·11 claims
- 4646US10236343B2Strain retention semiconductor member for channel SiGe layer of pFETGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 19, 2019·0 cites·12 claims
- 4741US7704821B2In-situ nitridation of high-k dielectricsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Apr 27, 2010·0 cites·13 claims
- 4841US2015179740A1Transistor device with strained layerGLOBAL FOUNDRIES INC·Filed 2013·Application pending·0 cites
- 4940US10109492B2Method of forming a high quality interfacial layer for a semiconductor device by performing a low temperature ALD processGLOBALFOUNDRIES INC·Filed 2013·Granted Oct 23, 2018·0 cites·20 claims
- 5040US2016064286A1Integrated circuits and methods for fabricating integrated circuitsGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
Showing the top 50 of 52 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →