Inventor · disambiguated record
Huiming Bu
Also filed as: BU HUIMING
93 granted patents·17 pending applications·980 citations·filing 2007–2024
99Inventor score
Top patents by PatentIndex Score
110 records- 0199US9496225B1Recessed metal liner contact with copper fillIBM·Filed 2016·Granted Nov 15, 2016·409 cites·10 claims
- 0298US9805935B2Bottom source/drain silicidation for vertical field-effect transistor (FET)IBM·Filed 2015·Granted Oct 31, 2017·27 cites·18 claims
- 0398US9721848B1Cutting fins and gates in CMOS devicesIBM·Filed 2016·Granted Aug 1, 2017·32 cites·20 claims
- 0498US9543435B1Asymmetric multi-gate finFETIBM·Filed 2015·Granted Jan 10, 2017·23 cites·3 claims
- 0598US8569152B1Cut-very-last dual-epi flowBASKER VEERARAGHAVAN S·Filed 2012·Granted Oct 29, 2013·65 cites·20 claims
- 0698US8445334B1SOI FinFET with recessed merged Fins and liner for enhanced stress couplingBASKER VEERARAGHAVAN S·Filed 2011·Granted May 21, 2013·41 cites·6 claims
- 0797US10229983B1Methods and structures for forming field-effect transistors (FETs) with low-k spacersIBM·Filed 2017·Granted Mar 12, 2019·16 cites·19 claims
- 0897US9853127B1Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer processIBM·Filed 2016·Granted Dec 26, 2017·18 cites·5 claims
- 0997US9773893B1Forming a sacrificial liner for dual channel devicesIBM·Filed 2016·Granted Sep 26, 2017·11 cites·20 claims
- 1096US10504889B1Integrating a junction field effect transistor into a vertical field effect transistorIBM·Filed 2018·Granted Dec 10, 2019·13 cites·10 claims
- 1196US10297667B1Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistorIBM·Filed 2017·Granted May 21, 2019·19 cites·16 claims
- 1296US9991267B1Forming eDRAM unit cell with VFET and via capacitanceIBM·Filed 2017·Granted Jun 5, 2018·12 cites·16 claims
- 1396US8455313B1Method for fabricating finFET with merged fins and vertical silicideBASKER VEERARAGHAVAN S·Filed 2012·Granted Jun 4, 2013·28 cites·7 claims
- 1495US10002962B2Vertical FET structureIBM·Filed 2016·Granted Jun 19, 2018·11 cites·18 claims
- 1595US9595599B1Dielectric isolated SiGe fin on bulk substrateIBM·Filed 2015·Granted Mar 14, 2017·9 cites·13 claims
- 1695US9589851B2Dipole-based contact structure to reduce metal-semiconductor contact resistance in MOSFETsIBM·Filed 2015·Granted Mar 7, 2017·13 cites·15 claims
- 1795US7696036B2CMOS transistors with differential oxygen content high-k dielectricsIBM·Filed 2007·Granted Apr 13, 2010·33 cites·7 claims
- 1894US8592264B2Source-drain extension formation in replacement metal gate transistor deviceANDO TAKASHI·Filed 2011·Granted Nov 26, 2013·17 cites·11 claims
- 1994US8592290B1Cut-very-last dual-EPI flowBASKER VEERARAGHAVAN S·Filed 2012·Granted Nov 26, 2013·16 cites·20 claims
- 2093US12268031B2Backside power rails and power distribution network for density scalingIBM·Filed 2021·Granted Apr 1, 2025·2 cites·12 claims
- 2193US8035173B2CMOS transistors with differential oxygen content high-K dielectricsIBM·Filed 2010·Granted Oct 11, 2011·14 cites·12 claims
- 2292US11894462B2Forming a sacrificial liner for dual channel devicesADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2021·Granted Feb 6, 2024·1 cites·20 claims
- 2392US10211316B2Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer processIBM·Filed 2017·Granted Feb 19, 2019·6 cites·14 claims
- 2492US8637931B2finFET with merged fins and vertical silicideBASKER VEERARAGHAVAN S·Filed 2011·Granted Jan 28, 2014·13 cites·18 claims
- 2591US10811528B2Two step fin etch and reveal for VTFETs and high breakdown LDVTFETsIBM·Filed 2018·Granted Oct 20, 2020·7 cites·6 claims
- 2691US9704848B2Electrostatic discharge devices and methods of manufactureIBM·Filed 2016·Granted Jul 11, 2017·4 cites·16 claims
- 2791US9570574B1Recessed metal liner contact with copper fillIBM·Filed 2016·Granted Feb 14, 2017·6 cites·14 claims
- 2890US9514998B1Polysilicon resistor formation in silicon-on-insulator replacement metal gate finFET processesIBM·Filed 2015·Granted Dec 6, 2016·5 cites·11 claims
- 2990US9425184B2Electrostatic discharge devices and methods of manufactureIBM·Filed 2015·Granted Aug 23, 2016·4 cites·9 claims
- 3090US8753964B2FinFET structure having fully silicided finBRYANT ANDRES·Filed 2011·Granted Jun 17, 2014·12 cites·12 claims
- 3189US10510892B2Forming a sacrificial liner for dual channel devicesIBM·Filed 2016·Granted Dec 17, 2019·3 cites·16 claims
- 3289US10224429B2Precise junction placement in vertical semiconductor devices using etch stop layersIBM·Filed 2017·Granted Mar 5, 2019·4 cites·20 claims
- 3388US9281303B2Electrostatic discharge devices and methods of manufactureIBM·Filed 2014·Granted Mar 8, 2016·5 cites·18 claims
- 3486US9954101B2Precise junction placement in vertical semiconductor devices using etch stop layersIBM·Filed 2016·Granted Apr 24, 2018·3 cites·11 claims
- 3585US10522636B2Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistorIBM·Filed 2019·Granted Dec 31, 2019·3 cites·20 claims
- 3685US9935003B2HDP fill with reduced void formation and spacer damageIBM·Filed 2017·Granted Apr 3, 2018·2 cites·19 claims
- 3785US8723262B2SOI FinFET with recessed merged fins and liner for enhanced stress couplingBASKER VEERARAGHAVAN S·Filed 2012·Granted May 13, 2014·6 cites·13 claims
- 3884US10157908B2Electrostatic discharge devices and methods of manufactureIBM·Filed 2017·Granted Dec 18, 2018·2 cites·12 claims
- 3982US9947748B2Dielectric isolated SiGe fin on bulk substrateIBM·Filed 2017·Granted Apr 17, 2018·2 cites·13 claims
- 4082US9583563B1Conformal doping for punch through stopper in fin field effect transistor devicesIBM·Filed 2015·Granted Feb 28, 2017·2 cites·16 claims
- 4182US9082788B2Method of making a semiconductor device including an all around gateST MICROELECTRONICS INC·Filed 2013·Granted Jul 14, 2015·6 cites·21 claims
- 4281US11329136B2Enabling anneal for reliability improvement and multi-Vt with interfacial layer regrowth suppressionIBM·Filed 2018·Granted May 10, 2022·2 cites·18 claims
- 4381US10418462B2Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer processIBM·Filed 2017·Granted Sep 17, 2019·2 cites·20 claims
- 4481US10312370B2Forming a sacrificial liner for dual channel devicesIBM·Filed 2017·Granted Jun 4, 2019·1 cites·14 claims
- 4581US10276558B1Electrostatic discharge protection using vertical fin CMOS technologyIBM·Filed 2017·Granted Apr 30, 2019·3 cites·18 claims
- 4680US10593802B2Forming a sacrificial liner for dual channel devicesTESSERA INC·Filed 2017·Granted Mar 17, 2020·1 cites·20 claims
- 4780US10083861B2HDP fill with reduced void formation and spacer damageIBM·Filed 2017·Granted Sep 25, 2018·1 cites·20 claims
- 4880US7863123B2Direct contact between high-κ/metal gate and wiring process flowIBM·Filed 2009·Granted Jan 4, 2011·8 cites·20 claims
- 4979US10573727B2Vertical transistor deviceIBM·Filed 2016·Granted Feb 25, 2020·2 cites·20 claims
- 5079US10347759B2Vertical FET structureIBM·Filed 2018·Granted Jul 9, 2019·2 cites·20 claims
Showing the top 50 of 110 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →