Inventor · disambiguated record
Indranil De
Also filed as: DE INDRANIL
115 granted patents·6 pending applications·544 citations·filing 2002–2024
99Inventor score
Top patents by PatentIndex Score
121 records- 0199US9496119B1E-beam inspection apparatus and method of using the same on various integrated circuit chipsPDF SOLUTIONS INC·Filed 2016·Granted Nov 15, 2016·77 cites·21 claims
- 0298US10593604B1Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Mar 17, 2020·19 cites·19 claims
- 0398US9870962B1Integrated circuit including NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gatesPDF SOLUTIONS INC·Filed 2017·Granted Jan 16, 2018·13 cites·19 claims
- 0498US9799575B2Integrated circuit containing DOEs of NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Oct 24, 2017·19 cites·11 claims
- 0597US9805994B1Mesh-style NCEM pads, and process for making semiconductor dies, chips, and wafers using in-line measurements from such padsPDF SOLUTIONS INC·Filed 2016·Granted Oct 31, 2017·15 cites·18 claims
- 0697US9627370B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Apr 18, 2017·15 cites·20 claims
- 0797US7280945B1Apparatus and methods for detection of systematic defectsKLA TENCOR TECH CORP·Filed 2002·Granted Oct 9, 2007·121 cites·35 claims
- 0896US10978438B1IC with test structures and E-beam pads embedded within a contiguous standard cell areaPDF SOLUTIONS INC·Filed 2019·Granted Apr 13, 2021·9 cites·14 claims
- 0996US6861666B1Apparatus and methods for determining and localization of failures in test structures using voltage contrastKLA TENCOR TECH CORP·Filed 2002·Granted Mar 1, 2005·106 cites·16 claims
- 1093US9741703B1Integrated circuit containing standard logic cells and ilbrary-compatible, NCEM-enabled fill cells, including at least via-open-configured, gate-short-configured, TS-short-configured, and AA-short-conigured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Aug 22, 2017·4 cites·20 claims
- 1193US9691672B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and metal-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Jun 27, 2017·4 cites·20 claims
- 1293US9627371B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and AA-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Apr 18, 2017·7 cites·20 claims
- 1393US8881677B2Shadow mask for patterned deposition on substratesINTERMOLECULAR INC·Filed 2012·Granted Nov 11, 2014·10 cites·17 claims
- 1490US10199288B1Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one side-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective side-to-side short, corner short, and via open test areasPDF SOLUTIONS INC·Filed 2018·Granted Feb 5, 2019·2 cites·20 claims
- 1590US10199283B1Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2017·Granted Feb 5, 2019·3 cites·20 claims
- 1690US9905487B1Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on test wafers that include multiple means/steps for enabling NC detection of V0 via opensPDF SOLUTIONS INC·Filed 2016·Granted Feb 27, 2018·3 cites·10 claims
- 1789US9786648B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Oct 10, 2017·2 cites·20 claims
- 1889US9773773B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATE-short-configured, and GATECNT-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 26, 2017·2 cites·20 claims
- 1989US9761575B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 12, 2017·2 cites·20 claims
- 2089US8770143B2Multi-region processing systemENDO RICK·Filed 2011·Granted Jul 8, 2014·19 cites·13 claims
- 2189US8278735B2Yttrium and titanium high-k dielectric filmsHASHIM IMRAN·Filed 2010·Granted Oct 2, 2012·10 cites·22 claims
- 2287US12429520B2Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic blockPDF SOLUTIONS INC·Filed 2024·Granted Sep 30, 2025·0 cites·20 claims
- 2387US10290552B1Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2018·Granted May 14, 2019·2 cites·20 claims
- 2487US10199294B1Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2018·Granted Feb 5, 2019·1 cites·20 claims
- 2587US9761573B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 12, 2017·2 cites·20 claims
- 2686US10096530B1Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including stitch open configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Oct 9, 2018·4 cites·14 claims
- 2786US8039052B2Multi-region processing system and headsINTERMOLECULAR INC·Filed 2007·Granted Oct 18, 2011·5 cites·9 claims
- 2886US7660687B1Robust measurement of parametersKLA TENCOR CORP·Filed 2006·Granted Feb 9, 2010·8 cites·19 claims
- 2985US12431333B2Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cellPDF SOLUTIONS INC·Filed 2024·Granted Sep 30, 2025·0 cites·5 claims
- 3085US9947601B1Integrated circuit including NCEM-enabled, side-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gatesPDF SOLUTIONS INC·Filed 2017·Granted Apr 17, 2018·1 cites·19 claims
- 3185US8882917B1Substrate processing including correction for deposition locationCHENG JEREMY·Filed 2009·Granted Nov 11, 2014·9 cites·10 claims
- 3284US9922968B1Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including chamfer short configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Mar 20, 2018·1 cites·23 claims
- 3384US9773774B1Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including chamfer short configured fill cells, and the second DOE including corner short configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Sep 26, 2017·4 cites·17 claims
- 3484US9721937B1Integrated circuit containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-tip short configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Aug 1, 2017·1 cites·23 claims
- 3583US9653446B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, TS-short-configured, and AA-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted May 16, 2017·2 cites·20 claims
- 3682US12038476B2Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic blockPDF SOLUTIONS INC·Filed 2023·Granted Jul 16, 2024·0 cites·18 claims
- 3782US9487885B2Substrate structures and methodsTIVRA CORP·Filed 2013·Granted Nov 8, 2016·2 cites·7 claims
- 3880US9911649B1Process for making and using mesh-style NCEM padsPDF SOLUTIONS INC·Filed 2016·Granted Mar 6, 2018·2 cites·3 claims
- 3980US9728553B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Aug 8, 2017·1 cites·20 claims
- 4080US8956952B2Multilayer substrate structure and method of manufacturing the sameTIVRA CORP·Filed 2013·Granted Feb 17, 2015·6 cites·23 claims
- 4180US7560939B1Electrical defect detection using pre-charge and sense scanning with prescribed delaysKLA TENCOR TECH CORP·Filed 2006·Granted Jul 14, 2009·10 cites·8 claims
- 4279US12020897B2Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cellPDF SOLUTIONS INC·Filed 2023·Granted Jun 25, 2024·0 cites·10 claims
- 4379US9831141B1Integrated circuit containing DOEs of GATE-snake-open-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Nov 28, 2017·1 cites·20 claims
- 4479US9711421B1Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of GATE-snake-open-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Jul 18, 2017·1 cites·20 claims
- 4578US11668746B2Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic blockPDF SOLUTIONS INC·Filed 2022·Granted Jun 6, 2023·0 cites·20 claims
- 4678US8449681B2Composition and method for removing photoresist and bottom anti-reflective coating for a semiconductor substrateDUONG ANH·Filed 2010·Granted May 28, 2013·3 cites·14 claims
- 4777US11605526B2Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cellPDF SOLUTIONS INC·Filed 2022·Granted Mar 14, 2023·0 cites·14 claims
- 4876US9929063B1Process for making an integrated circuit that includes NCEM-Enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gatesPDF SOLUTIONS INC·Filed 2017·Granted Mar 27, 2018·2 cites·19 claims
- 4976US9768083B1Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including snake open configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Sep 19, 2017·2 cites·16 claims
- 5076US9646961B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, TS-short-configured, and metal-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted May 9, 2017·1 cites·20 claims
Showing the top 50 of 121 patent records by PatentIndex Score.
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