Inventor · disambiguated record
Junwoo Myung
Also filed as: MYUNG JUNWOO
16 granted patents·5 pending applications·137 citations·filing 2006–2023
92Inventor score
Top patents by PatentIndex Score
21 records- 0198US9735113B2Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSPCHI HEEJO·Filed 2010·Granted Aug 15, 2017·60 cites·6 claims
- 0291US7871861B2Stacked integrated circuit package system with intra-stack encapsulationSTATS CHIPPAC LTD·Filed 2008·Granted Jan 18, 2011·22 cites·19 claims
- 0386US8421210B2Integrated circuit packaging system with dual side connection and method of manufacture thereofCHI HEEJO·Filed 2010·Granted Apr 16, 2013·9 cites·20 claims
- 0486US8304296B2Semiconductor packaging system with multipart conductive pillars and method of manufacture thereofKO CHANHOON·Filed 2010·Granted Nov 6, 2012·13 cites·20 claims
- 0584US7859120B2Package system incorporating a flip-chip assemblySTATS CHIPPAC LTD·Filed 2008·Granted Dec 28, 2010·11 cites·10 claims
- 0681US7968981B2Inline integrated circuit systemSTATS CHIPPAC LTD·Filed 2008·Granted Jun 28, 2011·8 cites·10 claims
- 0778US8501540B2Method for manufacture of inline integrated circuit systemYEE JAE HAK·Filed 2011·Granted Aug 6, 2013·4 cites·5 claims
- 0873US8183089B2Method for manufacturing package system incorporating flip-chip assemblyCHOI A LEAM·Filed 2010·Granted May 22, 2012·3 cites·10 claims
- 0972US10573600B2Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSPSTATS CHIPPAC PTE LTD·Filed 2017·Granted Feb 25, 2020·1 cites·25 claims
- 1072US8710634B2Integrated circuit packaging system with an integral-interposer-structure and method of manufacture thereofCHI HEEJO·Filed 2009·Granted Apr 29, 2014·6 cites·12 claims
- 1169US12154840B2Semiconductor device and semiconductor package having the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Nov 26, 2024·0 cites·20 claims
- 1263US11670568B2Semiconductor device and semiconductor package having the sameSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Jun 6, 2023·0 cites·18 claims
- 1355US2024128171A1Method of manufacturing semiconductor package, and semiconductor packageSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1453US2024080994A1Methods of reducing defects from pattern misalignmentSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1551US8138591B2Integrated circuit package system with stacked dieYEE JAE HAK·Filed 2007·Granted Mar 20, 2012·0 cites·10 claims
- 1649US8810019B2Integrated circuit package system with stacked dieYEE JAE HAK·Filed 2012·Granted Aug 19, 2014·0 cites·10 claims
- 1749US2024145326A1Semiconductor package manufacturing method and semiconductor packageSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1848US8937372B2Integrated circuit package system with molded strip protrusionYEE JAE HAK·Filed 2007·Granted Jan 20, 2015·0 cites·20 claims
- 1947US11088060B2Package module including a plurality of electronic components and semiconductor chip(s) embedded in a single packageSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Aug 10, 2021·0 cites·18 claims
- 2039US2007268660A1Spacerless semiconductor package chip stacking systemSTATS CHIPPAC LTD·Filed 2006·Application pending·0 cites
- 2138US2009283889A1Integrated circuit package systemJANG BYOUNG WOOK·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →