Inventor · disambiguated record
Kuo-Tai Huang
Also filed as: HUANG KUO-TAI
66 granted patents·10 pending applications·950 citations·filing 1995–2024
99Inventor score
Files withUNITED MICROELECTRONICS CORP35TAIWAN SEMICONDUCTOR MFG12TAIWAN SEMICONDUCTOR MFG CO LTD5HSU PENG-FU3HUANG KUO-TAI3
Top patents by PatentIndex Score
76 records- 0196US6368923B1Method of fabricating a dual metal gate having two different gate dielectric layersUNITED MICROELECTRONICS CORP·Filed 2000·Granted Apr 9, 2002·118 cites·24 claims
- 0294US10734280B2Integrated circuit devices and method of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Aug 4, 2020·14 cites·14 claims
- 0393US8383502B2Integrated high-K/metal gate in CMOS process flowTAIWAN SEMICONDUCTOR MFG·Filed 2011·Granted Feb 26, 2013·11 cites·15 claims
- 0493US7625791B2High-k dielectric metal gate device structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Dec 1, 2009·26 cites·14 claims
- 0593US7553763B2Salicide process utilizing a cluster ion implantation processUNITED MICROELECTRONICS CORP·Filed 2006·Granted Jun 30, 2009·22 cites·26 claims
- 0692US9601388B2Integrated high-K/metal gate in CMOS process flowTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Mar 21, 2017·6 cites·20 claims
- 0792US7812414B2Hybrid process for forming metal gatesTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Oct 12, 2010·20 cites·13 claims
- 0890USD371289SKnife-handleHUANG KUO-TAI·Filed 1995·Granted Jul 2, 1996·45 cites·1 claims
- 0989US8853068B2Method of fabricating dual high-k metal gate for MOS devicesHSU PENG-FU·Filed 2011·Granted Oct 7, 2014·9 cites·20 claims
- 1088US6078492AStructure of a capacitor in a semiconductor device having a self align contact window which has a slanted sidewallUNITED MICROELECTRONICS CORP·Filed 1998·Granted Jun 20, 2000·62 cites·15 claims
- 1187US8450161B2Method of fabricating a sealing structure for high-k metal gateCHEN CHIEN-HAO·Filed 2012·Granted May 28, 2013·9 cites·20 claims
- 1286US8003507B2Method of integrating high-K/metal gate in CMOS process flowTAIWAN SEMICONDUCTOR MFG·Filed 2009·Granted Aug 23, 2011·8 cites·8 claims
- 1385US8841731B2Integrated high-k/metal gate in CMOS process flowTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 23, 2014·5 cites·17 claims
- 1485US8105931B2Method of fabricating dual high-k metal gates for MOS devicesHSU PENG-FU·Filed 2009·Granted Jan 31, 2012·10 cites·11 claims
- 1584US9960160B2Method of forming a single metal that performs N work function and P work function in a high-k/metal gate processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted May 1, 2018·5 cites·13 claims
- 1681US5994183AMethod for forming charge storage structureUNITED MICROELECTRONICS CORP·Filed 1997·Granted Nov 30, 1999·49 cites·14 claims
- 1781US5956598AMethod for fabricating a shallow-trench isolation structure with a rounded corner in integrated circuitUNITED MICROELECTRONICS CORP·Filed 1998·Granted Sep 21, 1999·63 cites·10 claims
- 1880US8193586B2Sealing structure for high-K metal gateCHEN CHIEN-HAO·Filed 2009·Granted Jun 5, 2012·8 cites·20 claims
- 1978US8524588B2Method of forming a single metal that performs N work function and P work function in a high-k/metal gate processLIN YIH-ANN·Filed 2009·Granted Sep 3, 2013·5 cites·17 claims
- 2078US6555485B1Method for fabricating a gate dielectric layerUNITED MICROELECTRONICS CORP·Filed 2002·Granted Apr 29, 2003·33 cites·9 claims
- 2177US8536660B2Hybrid process for forming metal gates of MOS devicesHSU PENG-FU·Filed 2008·Granted Sep 17, 2013·8 cites·17 claims
- 2277US7989321B2Semiconductor device gate structure including a gettering layerTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Aug 2, 2011·5 cites·18 claims
- 2376US12015030B2Gate stacks for semiconductor devices of different conductivity typesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 18, 2024·0 cites·20 claims
- 2476US9257426B2Integrated high-k/metal gate in CMOS process flowTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Feb 9, 2016·2 cites·20 claims
- 2576US8148249B2Methods of fabricating high-k metal gate devicesLIN YIH-ANN·Filed 2009·Granted Apr 3, 2012·4 cites·17 claims
- 2673US8324090B2Method to improve dielectric quality in high-k metal gate technologyMASUOKA YURI·Filed 2008·Granted Dec 4, 2012·6 cites·21 claims
- 2773US7435640B2Method of fabricating gate structureUNITED MICROELECTRONICS CORP·Filed 2005·Granted Oct 14, 2008·4 cites·11 claims
- 2873US7265065B2Method for fabricating dielectric layer doped with nitrogenUNITED MICROELECTRONICS CORP·Filed 2005·Granted Sep 4, 2007·5 cites·12 claims
- 2970US6037206AMethod of fabricating a capacitor of a dynamic random access memoryUNITED MICROELECTRONICS CORP·Filed 1998·Granted Mar 14, 2000·29 cites·24 claims
- 3068US5895254AMethod of manufacturing shallow trench isolation structureUNITED MICROELECTRONICS CORP·Filed 1997·Granted Apr 20, 1999·35 cites·15 claims
- 3167US6455389B1Method for preventing a by-product ion moving from a spacerFiled 2001·Granted Sep 24, 2002·14 cites·17 claims
- 3267US6207497B1Conformity of ultra-thin nitride deposition for DRAM capacitorUNITED MICROELECTRONICS CORP·Filed 2000·Granted Mar 27, 2001·11 cites·42 claims
- 3367US5976951AMethod for preventing oxide recess formation in a shallow trench isolationUNITED MICROELECTRONICS CORP·Filed 1998·Granted Nov 2, 1999·40 cites·19 claims
- 3466US6146941AMethod for fabricating a capacitor in a semiconductor deviceUNITED MICROELECTRONICS CORP·Filed 1998·Granted Nov 14, 2000·21 cites·23 claims
- 3565US8836038B2CMOS dual metal gate semiconductor deviceHOU YONG-TIAN·Filed 2010·Granted Sep 16, 2014·2 cites·19 claims
- 3665US6479344B2Method of fabricating DRAM capacitorUNITED MICROELECTRONICS CORP·Filed 2000·Granted Nov 12, 2002·8 cites·3 claims
- 3764US7811892B2Multi-step annealing processUNITED MICROELECTRONICS CORP·Filed 2006·Granted Oct 12, 2010·2 cites·31 claims
- 3863US12447683B2Print cutting machineHUANG KUO TAI·Filed 2024·Granted Oct 21, 2025·0 cites·7 claims
- 3963US7214631B2Method of forming gate dielectric layerUNITED MICROELECTRONICS CORP·Filed 2005·Granted May 8, 2007·2 cites·9 claims
- 4063US6291288B1Method of fabricating a thin and structurally-undefective dielectric structure for a storage capacitor in dynamic random-access memoryUNITED MICROELECTRONICS CORP·Filed 1999·Granted Sep 18, 2001·26 cites·14 claims
- 4163US6235606B1Method of fabricating shallow trench isolationUNITED MICROELECTRONICS CORP·Filed 1999·Granted May 22, 2001·29 cites·14 claims
- 4263US6156600AMethod for fabricating capacitor in integrated circuitUNITED MICROELECTRONICS CORP·Filed 1998·Granted Dec 5, 2000·26 cites·20 claims
- 4362US7829949B2High-K dielectric metal gate device structureTAIWAN SEMCONDUCTOR MFG CO LTD·Filed 2009·Granted Nov 9, 2010·2 cites·20 claims
- 4462US6221712B1Method for fabricating gate oxide layerUNITED MICROELECTRONICS CORP·Filed 1999·Granted Apr 24, 2001·26 cites·27 claims
- 4561US6133086AFabrication method of a tantalum pentoxide dielectric layer for a DRAM capacitorUNITED MICROELECTRONICS CORP·Filed 1999·Granted Oct 17, 2000·24 cites·12 claims
- 4660US11289481B2Single metal that performs N work function and P work function in a high-K/metal gateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Mar 29, 2022·0 cites·20 claims
- 4759US8159035B2Metal gates of PMOS devices having high work functionsCHAO DONALD Y·Filed 2007·Granted Apr 17, 2012·2 cites·20 claims
- 4856US9263445B2Method of fabricating dual high-k metal gates for MOS devicesTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Feb 16, 2016·0 cites·20 claims
- 4955US6555425B2Method for manufacturing transistorUNITED MICROELECTRONICS CORP·Filed 2001·Granted Apr 29, 2003·10 cites·26 claims
- 5055US6251783B1Method of manufacturing shallow trench isolationUNITED MICROELECTRONICS CORP·Filed 1998·Granted Jun 26, 2001·20 cites·10 claims
Showing the top 50 of 76 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →