Inventor · disambiguated record
Manfred Eller
Also filed as: ELLER MANFRED · ELLER MANFRED J
49 granted patents·6 pending applications·1,039 citations·filing 2005–2018
98Inventor score
Files withGLOBALFOUNDRIES INC31INFINEON TECHNOLOGIES AG11SAMSUNG ELECTRONICS CO LTD3ELLER MANFRED2HAFFNER HENNING2
Top patents by PatentIndex Score
55 records- 0198US9576952B2Integrated circuits with varying gate structures and fabrication methodsGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 21, 2017·421 cites·20 claims
- 0298US9362180B2Integrated circuit having multiple threshold voltagesGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 7, 2016·425 cites·20 claims
- 0396US10083971B1Vertical SRAM structure with cross-coupling contacts penetrating through common gates to bottom S/D metal contactsGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 25, 2018·14 cites·15 claims
- 0496US7785946B2Integrated circuits and methods of design and manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2007·Granted Aug 31, 2010·30 cites·17 claims
- 0595US9082698B1Methods to improve FinFet semiconductor device behavior using co-implantation under the channel regionGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 14, 2015·30 cites·21 claims
- 0692US9455201B2Integration method for fabrication of metal gate based multiple threshold voltage devices and circuitsGLOBALFOUNDRIES INC·Filed 2014·Granted Sep 27, 2016·18 cites·17 claims
- 0791US7737009B2Method of implanting a non-dopant atom into a semiconductor deviceINFINEON TECHNOLOGIES AG·Filed 2007·Granted Jun 15, 2010·16 cites·16 claims
- 0890US9734897B1SRAM bitcell structures facilitating biasing of pass gate transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 15, 2017·7 cites·20 claims
- 0989US9842927B1Integrated circuit structure without gate contact and method of forming sameGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 12, 2017·5 cites·13 claims
- 1087US9824748B1SRAM bitcell structures facilitating biasing of pull-up transistorsGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 21, 2017·5 cites·20 claims
- 1187US8078998B2Integrated circuits and methods of design and manufacture thereofHAFFNER HENNING·Filed 2010·Granted Dec 13, 2011·5 cites·29 claims
- 1287US7205639B2Semiconductor devices with rotated substrates and methods of manufacture thereofIBM·Filed 2005·Granted Apr 17, 2007·12 cites·16 claims
- 1385US9543297B1Fin-FET replacement metal gate structure and method of manufacturing the sameGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 10, 2017·5 cites·11 claims
- 1484US9767244B2Integrated circuits and methods of design and manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2016·Granted Sep 19, 2017·2 cites·31 claims
- 1583US9087720B1Methods for forming FinFETs with reduced series resistanceGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 21, 2015·5 cites·20 claims
- 1682US10056468B2Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked finsGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 21, 2018·3 cites·12 claims
- 1782US8809958B2Integrated circuits and methods of design and manufacture thereofHAFFNER HENNING·Filed 2011·Granted Aug 19, 2014·3 cites·25 claims
- 1879US10529724B2Method of manufacturing a vertical SRAM with cross-coupled contacts penetrating through common gate structuresGLOBALFOUNDRIES INC·Filed 2018·Granted Jan 7, 2020·2 cites·20 claims
- 1976US10147802B2FINFET circuit structures with vertically spaced transistors and fabrication methodsGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 4, 2018·2 cites·7 claims
- 2076US9570586B2Fabrication methods facilitating integration of different device architecturesGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 14, 2017·4 cites·19 claims
- 2176US7449374B2Methods of manufacturing semiconductor devices with rotated substratesINFINEON TECHNOLOGIES AG·Filed 2007·Granted Nov 11, 2008·5 cites·24 claims
- 2274US9484417B1Methods of forming doped transition regions of transistor structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Nov 1, 2016·2 cites·14 claims
- 2373US9799661B1SRAM bitcell structures facilitating biasing of pull-down transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 24, 2017·2 cites·19 claims
- 2472US10243059B2Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked finsGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 26, 2019·1 cites·7 claims
- 2567US9136330B2Shallow trench isolationGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 15, 2015·1 cites·8 claims
- 2666US7501651B2Test structure of semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Mar 10, 2009·2 cites·24 claims
- 2764US8012821B2Semiconductor embedded resistor generationSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Sep 6, 2011·3 cites·21 claims
- 2864US7317204B2Test structure of semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Jan 8, 2008·2 cites·28 claims
- 2963US10089430B2Integrated circuits and methods of design and manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2017·Granted Oct 2, 2018·0 cites·13 claims
- 3061US9324707B2Integrated circuits and methods of design and manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2014·Granted Apr 26, 2016·0 cites·13 claims
- 3160US8846476B2Methods of forming multiple N-type semiconductor devices with different threshold voltages on a semiconductor substrateGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 30, 2014·1 cites·31 claims
- 3260US8431972B2Semiconductor ESD device and method of making sameALVAREZ DAVID·Filed 2006·Granted Apr 30, 2013·2 cites·24 claims
- 3359US10424584B2Semiconductor memory devices having an undercut source/drain regionGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 24, 2019·0 cites·7 claims
- 3458US9209088B2Semiconductor devices and methods of manufacture thereofELLER MANFRED·Filed 2007·Granted Dec 8, 2015·2 cites·21 claims
- 3557US10483172B2Transistor device structures with retrograde wells in CMOS applicationsGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 19, 2019·0 cites·16 claims
- 3657US10121893B2Integrated circuit structure without gate contact and method of forming sameGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 6, 2018·0 cites·14 claims
- 3755US10157927B2Semiconductor memory devices having an undercut source/drain regionGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 18, 2018·0 cites·13 claims
- 3855US9070759B2Semiconductor device and method of making sameHAN JIN-PING·Filed 2006·Granted Jun 30, 2015·1 cites·16 claims
- 3953US9852954B2Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Dec 26, 2017·0 cites·19 claims
- 4053US7947606B2Methods of forming conductive features and structures thereofINFINEON TECHNOLOGIES AG·Filed 2008·Granted May 24, 2011·0 cites·24 claims
- 4152US9209181B2Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structuresGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 8, 2015·0 cites·10 claims
- 4252US8242550B2Semiconductor devicesSCHIML THOMAS·Filed 2010·Granted Aug 14, 2012·1 cites·20 claims
- 4351US9917191B2Semiconductor devices and methods of manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2015·Granted Mar 13, 2018·0 cites·16 claims
- 4451US7820518B2Transistor fabrication methods and structures thereofINFINEON TECHNOLOGIES AG·Filed 2008·Granted Oct 26, 2010·0 cites·23 claims
- 4547US7892939B2Threshold voltage consistency and effective width in same-substrate device groupsINFINEON TECHNOLOGIES AG·Filed 2008·Granted Feb 22, 2011·0 cites·19 claims
- 4647US2015348830A1Shallow trench isolationGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
- 4746US2011175148A1Methods of Forming Conductive Features and Structures ThereofYAN JIANG·Filed 2011·Application pending·0 cites
- 4845US10290654B2Circuit structures with vertically spaced transistors and fabrication methodsGLOBALFOUNDRIES INC·Filed 2016·Granted May 14, 2019·0 cites·8 claims
- 4945US7776726B2Semiconductor devices and methods of manufacture thereofINFINEON TECHNOLOGIES AG·Filed 2006·Granted Aug 17, 2010·0 cites·31 claims
- 5044US2015340501A1Forming independent-gate finfet with tilted pre-amorphization implantation and resulting deviceGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
Showing the top 50 of 55 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →