Inventor · disambiguated record
Michael I. Current
Also filed as: CURRENT MICHAEL · CURRENT MICHAEL I · CURRENT MICHAEL IRA
18 granted patents·4 pending applications·239 citations·filing 1990–2024
94Inventor score
Top patents by PatentIndex Score
22 records- 0196US11410984B1Three dimensional integrated circuit with lateral connection layerSILICON GENESIS CORP·Filed 2021·Granted Aug 9, 2022·9 cites·20 claims
- 0295US9704835B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2016·Granted Jul 11, 2017·32 cites·22 claims
- 0394US10573627B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2018·Granted Feb 25, 2020·14 cites·22 claims
- 0494US10049915B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2017·Granted Aug 14, 2018·21 cites·20 claims
- 0592US12176326B2Method of forming semiconductor device using high stress cleave planeSILICON GENESIS CORP·Filed 2023·Granted Dec 24, 2024·1 cites·20 claims
- 0691US7019513B1Non-contact method and apparatus for measurement of sheet resistance and leakage current of p-n junctionsFAIFER VLADIMIR·Filed 2005·Granted Mar 28, 2006·32 cites·19 claims
- 0789US7642772B1Non-contact method and apparatus for measurement of leakage current of p-n junctions in IC product wafersAHBEE 1 L P·Filed 2007·Granted Jan 5, 2010·14 cites·8 claims
- 0888US10896823B2Limited dose atomic layer processes for localizing coatings on non-planar surfacesSEIDEL THOMAS E·Filed 2019·Granted Jan 19, 2021·5 cites·5 claims
- 0988US7414409B1Non-contact method and apparatus for measurement of leakage current of p-n junctions in IC product wafersFAIFER VLADIMIR·Filed 2005·Granted Aug 19, 2008·23 cites·9 claims
- 1085US10804252B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2020·Granted Oct 13, 2020·2 cites·20 claims
- 1183US5047648AMethod and apparatus for detecting particles in ion implantation machinesAPPLIED MATERIALS INC·Filed 1990·Granted Sep 10, 1991·41 cites·12 claims
- 1274US2024145459A1Three dimensional integrated circuit with interconnect network layerSILICON GENESIS CORP·Filed 2024·Application pending·0 cites
- 1373US11901351B2Three dimensional integrated circuit with lateral connection layerSILICON GENESIS CORP·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 1472US11626392B2Method of forming semiconductor device using range compensating materialSILICON GENESIS CORP·Filed 2021·Granted Apr 11, 2023·0 cites·21 claims
- 1569US10923459B2Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2020·Granted Feb 16, 2021·0 cites·21 claims
- 1666US5155369AMultiple angle implants for shallow implantAPPLIED MATERIALS INC·Filed 1990·Granted Oct 13, 1992·40 cites·12 claims
- 1751US8187377B2Non-contact etch annealing of strained layersMALIK IGOR J·Filed 2002·Granted May 29, 2012·5 cites·20 claims
- 1850US10923359B2Limited dose and angle directed beam assisted ALE and ALD processes for localized coatings on non-planar surfacesSEIDEL THOMAS E·Filed 2020·Granted Feb 16, 2021·0 cites·13 claims
- 1948US2018175008A1Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2018·Application pending·0 cites
- 2046US2017301657A1Three dimensional integrated circuitSILICON GENESIS CORP·Filed 2017·Application pending·0 cites
- 2135US2016379828A1Silicon doping source films by ald depositionMANE ANIL U·Filed 2016·Application pending·0 cites
- 2225USD645768SJunction photovoltage probe faceABHEE 1 L P·Filed 2010·Granted Sep 27, 2011·0 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →