Inventor · disambiguated record
Mun Leong Loke
Also filed as: LOKE MUN L · LOKE MUN LEONG
7 granted patents·4 pending applications·103 citations·filing 1999–2015
84Inventor score
Top patents by PatentIndex Score
11 records- 0186US6713366B2Method of thinning a wafer utilizing a laminated reinforcing layer over the device sideINTEL CORP·Filed 2002·Granted Mar 30, 2004·58 cites·27 claims
- 0268US6490166B1Integrated circuit package having a substrate vent holeINTEL CORP·Filed 1999·Granted Dec 3, 2002·30 cites·16 claims
- 0355US8258019B2Flip chip assembly process for ultra thin substrate and package on package assemblyMONG WENG KHOON·Filed 2008·Granted Sep 4, 2012·2 cites·9 claims
- 0455US7208342B2Package warpage controlINTEL CORP·Filed 2004·Granted Apr 24, 2007·8 cites·7 claims
- 0551US9397016B2Flip chip assembly process for ultra thin substrate and package on package assemblyINTEL CORP·Filed 2014·Granted Jul 19, 2016·0 cites·18 claims
- 0649USRE44629EProcess for assembling an integrated circuit package having a substrate vent holeRAMALINGAM SURESH·Filed 2004·Granted Dec 10, 2013·5 cites·16 claims
- 0742US8847368B2Flip chip assembly process for ultra thin substrate and package on package assemblyMONG WENG KHOON·Filed 2012·Granted Sep 30, 2014·0 cites·16 claims
- 0842US2007205501A1Package warpage controlINTEL CORP·Filed 2007·Application pending·0 cites
- 0942US2007155059A1Package warpage controlINTEL CORP·Filed 2007·Application pending·0 cites
- 1042US2009309238A1Molded flip chip package with enhanced mold-die adhesionLOKE MUN LEONG·Filed 2008·Application pending·0 cites
- 1128US2017170108A1Chip carrier having variably-sized padsINTEL CORP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →