Inventor · disambiguated record
Shih-Wen Chou
Also filed as: CHOU SHIH-WEN
29 granted patents·12 pending applications·165 citations·filing 2001–2019
95Inventor score
Files withCHIPMOS TECHNOLOGIES INC22CHOU SHIH-WEN5CHIPMOS TECHNOLOGY INC4PAN YU-TANG3CHIPMOS TECHNOLOGIES BERMUDA2
Top patents by PatentIndex Score
41 records- 0194US7436074B2Chip package without core and stacked chip package structure thereofCHIPMOS TECHNOLOGIES INC·Filed 2005·Granted Oct 14, 2008·34 cites·29 claims
- 0292US9728479B2Multi-chip package structure, wafer level chip package structure and manufacturing process thereofCHIPMOS TECHNOLOGIES INC·Filed 2015·Granted Aug 8, 2017·9 cites·10 claims
- 0391US7510889B2Light emitting chip package and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Mar 31, 2009·32 cites·13 claims
- 0490US7723853B2Chip package without core and stacked chip package structureCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted May 25, 2010·17 cites·5 claims
- 0585US6703075B1Wafer treating method for making adhesive diesCHIPMOS TECHNOLOGIES BERMUDA·Filed 2002·Granted Mar 9, 2004·37 cites·16 claims
- 0678US9653429B2Multi-chip package structure having blocking structure, wafer level chip package structure having blocking structure and manufacturing process thereofCHIPMOS TECHNOLOGIES INC·Filed 2015·Granted May 16, 2017·2 cites·13 claims
- 0776US10002815B2Multi-chip package structure manufacturing process and wafer level chip package structure manufacturing processCHIPMOS TECHNOLOGIES INC·Filed 2017·Granted Jun 19, 2018·2 cites·10 claims
- 0871US7514299B2Chip package structure and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2006·Granted Apr 7, 2009·5 cites·5 claims
- 0970US7902649B2Leadframe for leadless package, structure and manufacturing method using the sameCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Mar 8, 2011·3 cites·12 claims
- 1070US7851896B2Quad flat non-leaded chip packageCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Dec 14, 2010·4 cites·13 claims
- 1168US7884486B2Chip-stacked package structure and method for manufacturing the sameCHIPMOS TECHNOLOGY INC·Filed 2009·Granted Feb 8, 2011·4 cites·28 claims
- 1266US9053968B2Semiconductor package structure and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2012·Granted Jun 9, 2015·2 cites·20 claims
- 1365US8691630B2Semiconductor package structure and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2012·Granted Apr 8, 2014·2 cites·10 claims
- 1464US8772089B2Chip package structure and manufacturing method thereofPAN YU-TANG·Filed 2012·Granted Jul 8, 2014·2 cites·12 claims
- 1563US8652882B2Chip package structure and chip packaging methodPAN YU TANG·Filed 2011·Granted Feb 18, 2014·2 cites·6 claims
- 1663USRE42349EWafer treating method for making adhesive diesCHIPMOS TECHNOLOGIES BERMUDA·Filed 2006·Granted May 10, 2011·2 cites·16 claims
- 1761US7696629B2Chip-stacked package structureCHIPMOS TECHNOLOGY INC·Filed 2007·Granted Apr 13, 2010·2 cites·13 claims
- 1860US7592694B2Chip package and method of manufacturing the sameCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Sep 22, 2009·2 cites·19 claims
- 1959US8309401B2Method of manufacturing non-leaded package structureCHOU SHIH-WEN·Filed 2011·Granted Nov 13, 2012·2 cites·10 claims
- 2053US9437529B2Chip package structure and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2014·Granted Sep 6, 2016·0 cites·9 claims
- 2151US9953960B2Manufacturing process of wafer level chip package structure having block structureCHIPMOS TECHNOLOGIES INC·Filed 2017·Granted Apr 24, 2018·0 cites·9 claims
- 2249US7843054B2Chip package and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2009·Granted Nov 30, 2010·0 cites·8 claims
- 2347US9735092B2Manufacturing method of chip package structureCHIPMOS TECHNOLOGIES INC·Filed 2016·Granted Aug 15, 2017·0 cites·7 claims
- 2447US2008265400A1Chip-Stacked Package Structure and Applications ThereofCHIPMOS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 2546US8105876B2Leadframe for leadless package, structure and manufacturing method using the sameLIN CHUN YING·Filed 2011·Granted Jan 31, 2012·0 cites·6 claims
- 2646US8106494B2Leadframe for leadless package, structure and manufacturing method using the sameLIN CHUN YING·Filed 2011·Granted Jan 31, 2012·0 cites·8 claims
- 2746US2008315417A1Chip packageCHIPMOS TECHNOLOGIES INC·Filed 2008·Application pending·0 cites
- 2846US2010123234A1Multi-chip package and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2009·Application pending·0 cites
- 2945US2015236245A1Semiconductor package and method thereofCHIPMOS TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3044US7605461B2Chip package structureCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Oct 20, 2009·0 cites·15 claims
- 3144US2015076670A1Chip package structure and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3243US7919874B2Chip package without core and stacked chip package structureCHIPMOS TECHNOLOGIES·Filed 2010·Granted Apr 5, 2011·0 cites·5 claims
- 3342US2010155929A1Chip-Stacked Package StructureCHIPMOS TECHNOLOGY INC·Filed 2010·Application pending·0 cites
- 3442US2007228581A1Universal chip package structureCHOU SHIH-WEN·Filed 2007·Application pending·0 cites
- 3541US10665277B2Timing calibration system and a method thereofNUVOTON TECHNOLOGY CORP·Filed 2019·Granted May 26, 2020·0 cites·10 claims
- 3640US2007080466A1Universal chip package structureCHOU SHIH-WEN·Filed 2006·Application pending·0 cites
- 3739US2008283981A1Chip-On-Lead and Lead-On-Chip Stacked StructureCHOU SHIH-WEN·Filed 2008·Application pending·0 cites
- 3838US8148827B2Quad flat no lead (QFN) packagePAN YU-TANG·Filed 2010·Granted Apr 3, 2012·0 cites·9 claims
- 3935US2002140064A1Semiconductor chip package and lead frame structure thereofADVANCED SEMICONDUCTOR ENG·Filed 2001·Application pending·0 cites
- 4034US2015232325A1Micro electro mechanical systems package and manufacturing method thereofCHIPMOS TECHNOLOGIES INC·Filed 2015·Application pending·0 cites
- 4133US2012241935A1Package-on-package structureCHOU SHIH-WEN·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →