Inventor · disambiguated record
Shenqing Fang
Also filed as: FANG SHENQING
97 granted patents·30 pending applications·265 citations·filing 2001–2021
99Inventor score
Files withSPANSION LLC54CYPRESS SEMICONDUCTOR CORP37FANG SHENQING12MONTEREY RES LLC7ADVANCED MICRO DEVICES INC2
Top patents by PatentIndex Score
127 records- 0191US10038004B2NAND memory cell string having a stacked select gate structure and process for for forming sameCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Jul 31, 2018·5 cites·17 claims
- 0290US10361215B2NAND memory cell string having a stacked select gate structure and process for for forming sameCYPRESS SEMICONDUCTOR CORP·Filed 2018·Granted Jul 23, 2019·4 cites·18 claims
- 0390US10014380B2Memory first process flow and deviceCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Jul 3, 2018·4 cites·14 claims
- 0490US8822289B2High voltage gate formationSPANSION LLC·Filed 2012·Granted Sep 2, 2014·9 cites·10 claims
- 0589US9368606B2Memory first process flow and deviceSPANSION LLC·Filed 2012·Granted Jun 14, 2016·9 cites·24 claims
- 0687US8035153B2Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applicationsSPANSION LLC·Filed 2010·Granted Oct 11, 2011·9 cites·27 claims
- 0786US8263458B2Process margin engineering in charge trapping field effect transistorsCHEN TUNG-SHENG·Filed 2010·Granted Sep 11, 2012·10 cites·20 claims
- 0886US6987696B1Method of improving erase voltage distribution for a flash memory array having dummy wordlinesSPANSION LLC·Filed 2004·Granted Jan 17, 2006·38 cites·12 claims
- 0985US8461053B2Self-aligned NAND flash select-gate wordlines for spacer double patterningCHEN TUNG-SHENG·Filed 2010·Granted Jun 11, 2013·7 cites·15 claims
- 1084US8874253B2Self-aligned NAND flash select-gate wordlines for spacer double patterningSPANSION LLC·Filed 2013·Granted Oct 28, 2014·5 cites·15 claims
- 1184US8349685B2Dual spacer formation in flash memorySPANSION LLC·Filed 2010·Granted Jan 8, 2013·8 cites·10 claims
- 1283US10566341B2NAND memory cell string having a stacked select gate structure and process for for forming sameCYPRESS SEMICONDUCTOR CORP·Filed 2019·Granted Feb 18, 2020·3 cites·12 claims
- 1383US9917166B2Memory first process flow and deviceCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Mar 13, 2018·3 cites·14 claims
- 1482US8836006B2Integrated circuits with non-volatile memory and methods for manufactureSPANSION LLC·Filed 2012·Granted Sep 16, 2014·4 cites·13 claims
- 1581US9209197B2Memory gate landing pad made from dummy featuresSPANSION LLC·Filed 2012·Granted Dec 8, 2015·5 cites·15 claims
- 1681US8669597B2Memory device interconnects and method of manufacturingFANG SHENQING·Filed 2008·Granted Mar 11, 2014·6 cites·19 claims
- 1781US7951704B2Memory device peripheral interconnects and method of manufacturingSPANSION LLC·Filed 2009·Granted May 31, 2011·8 cites·10 claims
- 1879US9589805B2Split-gate semiconductor device with L-shaped gateCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted Mar 7, 2017·2 cites·8 claims
- 1978US6808992B1Method and system for tailoring core and periphery cells in a nonvolatile memorySPANSION LLC·Filed 2002·Granted Oct 26, 2004·24 cites·16 claims
- 2077US9997253B1Non-volatile memory array with memory gate line and source line scramblingCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Jun 12, 2018·3 cites·21 claims
- 2176US11257675B2Tilted implant for poly resistorsCYPRESS SEMICONDUCTOR CORP·Filed 2019·Granted Feb 22, 2022·1 cites·15 claims
- 2276US7851306B2Method for forming a flash memory device with straight word linesSPANSION LLC·Filed 2008·Granted Dec 14, 2010·4 cites·9 claims
- 2374US8441063B2Memory with extended charge trapping layerFANG SHENQING·Filed 2010·Granted May 14, 2013·4 cites·12 claims
- 2473US11342429B2Memory first process flow and deviceCYPRESS SEMICONDUCTOR CORP·Filed 2020·Granted May 24, 2022·0 cites·18 claims
- 2573US11069699B2NAND memory cell string having a stacked select gate structure and process for forming sameCYPRESS SEMICONDUCTOR CORP·Filed 2020·Granted Jul 20, 2021·0 cites·13 claims
- 2673US8143661B2Memory cell system with charge trapFANG SHENQING·Filed 2006·Granted Mar 27, 2012·5 cites·19 claims
- 2772US11450680B2Split gate charge trapping memory cells having different select gate and memory gate heightsCYPRESS SEMICONDUCTOR CORP·Filed 2020·Granted Sep 20, 2022·0 cites·13 claims
- 2872US10756101B2NAND memory cell string having a stacked select gate structure and process for for forming sameCYPRESS SEMICONDUCTOR CORP·Filed 2020·Granted Aug 25, 2020·0 cites·20 claims
- 2972US9466496B2Spacer formation with straight sidewallSPANSION LLC·Filed 2013·Granted Oct 11, 2016·2 cites·15 claims
- 3072US7488657B2Method and system for forming straight word lines in a flash memory arraySPANSION LLC·Filed 2005·Granted Feb 10, 2009·3 cites·8 claims
- 3172US2021134715A1Memory Device Interconnects and Method of ManufactureMONTEREY RES LLC·Filed 2020·Application pending·0 cites
- 3271US7732276B2Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applicationsSPANSION LLC·Filed 2007·Granted Jun 8, 2010·4 cites·20 claims
- 3371US7675104B2Integrated circuit memory system employing silicon rich layersSPANSION LLC·Filed 2006·Granted Mar 9, 2010·3 cites·10 claims
- 3470US10141393B1Three dimensional capacitorCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Nov 27, 2018·1 cites·17 claims
- 3569US12237387B2Method of spacer formation with straight sidewall of memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2021·Granted Feb 25, 2025·0 cites·20 claims
- 3669US11069789B2Varied silicon richness silicon nitride formationMONTEREY RES LLC·Filed 2020·Granted Jul 20, 2021·0 cites·1 claims
- 3768US8441041B2Memory device peripheral interconnectsFANG SHENQING·Filed 2010·Granted May 14, 2013·2 cites·11 claims
- 3867US9614105B2Charge-trap NOR with silicon-rich nitride as a charge trap layerCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Apr 4, 2017·2 cites·6 claims
- 3967US8551858B2Self-aligned SI rich nitride charge trap layer isolation for charge trap flash memoryFANG SHENQING·Filed 2010·Granted Oct 8, 2013·2 cites·11 claims
- 4067US2022005933A1Varied silicon richness silicon nitride formationMONTEREY RES LLC·Filed 2021·Application pending·0 cites
- 4166US10833013B2Memory device interconnects and method of manufactureMONTEREY RES LLC·Filed 2019·Granted Nov 10, 2020·0 cites·13 claims
- 4266US10818761B2Memory first process flow and deviceCYPRESS SEMICONDUCTOR CORP·Filed 2019·Granted Oct 27, 2020·0 cites·8 claims
- 4366US6927129B1Narrow wide spacerADVANCED MICRO DEVICES INC·Filed 2004·Granted Aug 9, 2005·12 cites·23 claims
- 4464US8785275B2Non-volatile FINFET memory device and manufacturing method thereofSPANSION LLC·Filed 2014·Granted Jul 22, 2014·1 cites·10 claims
- 4563US10403731B2Memory first process flow and deviceCYPRESS SEMICONDUCTOR CORP·Filed 2018·Granted Sep 3, 2019·0 cites·20 claims
- 4663US9012333B2Varied silicon richness silicon nitride formationMA YI·Filed 2009·Granted Apr 21, 2015·1 cites·20 claims
- 4763US7029975B1Method and apparatus for eliminating word line bending by source side implantationADVANCED MIRCO DEVICES INC·Filed 2004·Granted Apr 18, 2006·11 cites·12 claims
- 4862US10833009B2Memory device interconnects and method of manufactureMONTEREY RES LLC·Filed 2018·Granted Nov 10, 2020·0 cites·7 claims
- 4962US8686492B2Non-volatile FINFET memory device and manufacturing method thereofCHEN CHUN·Filed 2010·Granted Apr 1, 2014·1 cites·10 claims
- 5062US8598646B2Non-volatile FINFET memory array and manufacturing method thereofCHEN CHUN·Filed 2011·Granted Dec 3, 2013·1 cites·11 claims
Showing the top 50 of 127 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →